* Re: [PATCH stable] MIPS: ath79: Fix CPU/DDR frequency calculation for SRIF PLLs
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@ 2012-10-15 20:17 ` Greg KH
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From: Greg KH @ 2012-10-15 20:17 UTC (permalink / raw)
To: Gabor Juhos; +Cc: stable, linux-mips, Ralf Baechle
On Sun, Oct 14, 2012 at 06:17:16PM +0200, Gabor Juhos wrote:
> commit 97541ccfb9db2bb9cd1dde6344d5834438d14bda upstream.
>
> Besides the CPU and DDR PLLs, the CPU and DDR frequencies
> can be derived from other PLLs in the SRIF block on the
> AR934x SoCs. The current code does not checks if the SRIF
> PLLs are used and this can lead to incorrectly calculated
> CPU/DDR frequencies.
>
> Fix it by calculating the frequencies from SRIF PLLs if
> those are used on a given board.
>
> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
> Cc: linux-mips@linux-mips.org
> Patchwork: https://patchwork.linux-mips.org/patch/4324/
> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
> ---
> The original change was a candidate for stable (3.5+) however it was
> rejected during the stable-review process due to conflicts in
> 'arch/mips/include/asm/mach-ath79/ar71xx_regs.h'
>
> This is a backport of the aforementioned commit, and it is applicable
> to 3.5.7 and 3.6.2.
3.5 is now end-of-life, but 3.6 is still alive, so I've applied this
there.
greg k-h
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