* Loongson2 cpu_wait function
@ 2013-05-23 12:27 Ralf Baechle
2013-05-23 20:28 ` Aaro Koskinen
0 siblings, 1 reply; 2+ messages in thread
From: Ralf Baechle @ 2013-05-23 12:27 UTC (permalink / raw)
To: linux-mips
During the 3.10 merge cycle many MIPS platforms were broken by the
generic idle loop patches. A patch series to fix this has already been
merged but I'm wondering if fb40bc3e94933007d3e42e96daf1ec8044821cb8
[MIPS: Idle: Re-enable irqs at the end of r3081, au1k and loongson2
cpu_wait.] is sufficient and correct for Loongson 2.
In particular:
o drivers/cpufreq/loongson2_cpufreq.c protects accesses to LOONGSON_CHIPCFG0
in loongson2_cpu_wait with a spinlock. This spinlock is not used anywhere
else in the kernel so it would appear there is still a race with other
accesses to LOONGSON_CHIPCFG0.
o It's not SMPly correct - even if cpufreq_exit restores the old value of
cpu_wait on a SMP system another processor might still be executing
loongson2_cpu_wait().
o I'd appreciate if at least some basic power saving would be used even if
CONFIG_LOONGSON2_CPUFREQ was disabled, that is loongson2_cpu_wait should
go back to arch/mips/kernel/idle.c.
o Could somebody test if Loongson 2 is working? Thanks!
Ralf
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: Loongson2 cpu_wait function
2013-05-23 12:27 Loongson2 cpu_wait function Ralf Baechle
@ 2013-05-23 20:28 ` Aaro Koskinen
0 siblings, 0 replies; 2+ messages in thread
From: Aaro Koskinen @ 2013-05-23 20:28 UTC (permalink / raw)
To: Ralf Baechle; +Cc: linux-mips
Hi,
On Thu, May 23, 2013 at 02:27:37PM +0200, Ralf Baechle wrote:
> During the 3.10 merge cycle many MIPS platforms were broken by the
> generic idle loop patches. A patch series to fix this has already been
> merged but I'm wondering if fb40bc3e94933007d3e42e96daf1ec8044821cb8
> [MIPS: Idle: Re-enable irqs at the end of r3081, au1k and loongson2
> cpu_wait.] is sufficient and correct for Loongson 2.
>
> In particular:
>
> o drivers/cpufreq/loongson2_cpufreq.c protects accesses to LOONGSON_CHIPCFG0
> in loongson2_cpu_wait with a spinlock. This spinlock is not used anywhere
> else in the kernel so it would appear there is still a race with other
> accesses to LOONGSON_CHIPCFG0.
> o It's not SMPly correct - even if cpufreq_exit restores the old value of
> cpu_wait on a SMP system another processor might still be executing
> loongson2_cpu_wait().
I think Loongson2 is UP-only?
> o I'd appreciate if at least some basic power saving would be used even if
> CONFIG_LOONGSON2_CPUFREQ was disabled, that is loongson2_cpu_wait should
> go back to arch/mips/kernel/idle.c.
> o Could somebody test if Loongson 2 is working? Thanks!
It works (tested d97955625710b57f24427e403f150126078273c2), but cpufreq
seems to be broken for some reason:
[ 6.136000] calling cpufreq_init+0x0/0x8c @ 1
[ 6.140000] cpufreq: Loongson-2F CPU frequency driver.
[ 6.144000] initcall cpufreq_init+0x0/0x8c returned -19 after 4000 usecs
I would also like to remind that the boot is still unreliable without
this patch: http://patchwork.linux-mips.org/patch/4958/
A.
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