From: Ralf Baechle <ralf@linux-mips.org>
To: "Maciej W. Rozycki" <macro@linux-mips.org>
Cc: Jonas Gorski <jogo@openwrt.org>,
MIPS Mailing List <linux-mips@linux-mips.org>
Subject: Re: [PATCH v3] MIPS: Tell R4k SC and MC variations apart
Date: Tue, 24 Sep 2013 11:11:02 +0200 [thread overview]
Message-ID: <20130924091102.GB21257@linux-mips.org> (raw)
In-Reply-To: <alpine.LFD.2.03.1309231358090.16797@linux-mips.org>
On Mon, Sep 23, 2013 at 02:01:53PM +0100, Maciej W. Rozycki wrote:
> There is no reliable way to tell R4000/R4400 SC and MC variations apart,
> however simple heuristic should give good results. Only the MC version
> supports coherent caching so we can rely on such a mode having been set
> for KSEG0 by the power-on firmware to reliably indicate an MC processor.
> SC processors reportedly hang on coherent cached memory accesses and Linux
> is linked to a cached load address so the firmware has to use the correct
> caching mode to download the kernel image in a cached mode successfully.
>
> OTOH if the firmware chooses to use either the non-coherent cached or the
> uncached mode for KSEG0 on an MC processor, then the SC variant will be
> reported, just as we currently do, so no regression here.
Queued for 3.13. Thanks,
Ralf
next prev parent reply other threads:[~2013-09-24 9:11 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-22 22:30 [PATCH] MIPS: Tell R4k SC and MC variations apart Maciej W. Rozycki
2013-09-23 11:37 ` Jonas Gorski
2013-09-23 12:35 ` [PATCH v2] " Maciej W. Rozycki
2013-09-23 12:41 ` Jonas Gorski
2013-09-23 13:01 ` [PATCH v3] " Maciej W. Rozycki
2013-09-24 9:11 ` Ralf Baechle [this message]
2013-09-24 8:48 ` [PATCH] " Ralf Baechle
2013-09-24 23:37 ` Maciej W. Rozycki
2013-09-25 11:02 ` Ralf Baechle
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