Re: [PATCH 2/2] MIPS: mm: Use scratch for PGD when !CONFIG_MIPS_PGD_C0_CONTEXT

["Jayachandran C." <jchandra@broadcom.com>]

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On Tue, Sep 24, 2013 at 11:49:43PM +0200, Hauke Mehrtens wrote:
> On 08/11/2013 01:40 PM, Jayachandran C wrote:
> > Allow usage of scratch register for current pgd even when
> > MIPS_PGD_C0_CONTEXT is not configured. MIPS_PGD_C0_CONTEXT is set
> > for 64r2 platforms to indicate availability of Xcontext for saving
> > cpuid, thus freeing Context to be used for saving PGD. This option
> > was also tied to using a scratch register for storing PGD.
> > 
> > This commit will allow usage of scratch register to store the current
> > pgd if one can be allocated for the platform, even when
> > MIPS_PGD_C0_CONTEXT is not set. The cpuid will be kept in the CP0
> > Context register in this case.
> > 
> > The code to store the current pgd for the TLB miss handler is now
> > generated in all cases. When scratch register is available, the PGD
> > is also stored in the scratch register.
> > 
> > Signed-off-by: Jayachandran C <jchandra@broadcom.com>
> 
> This patch breaks booting for me on bcm47xx. I found this commit by
> bisecting and then reverted it and it made bcm47xx boot again. The boot
> process stops after: [    0.000000] Inode-cache hash table entries: 4096
> (order: 2, 16384 bytes)
> 
> The next message would be: [    0.000000] Writing ErrCtl register=00000000
> 
> This issue was seen on bcm4716.
> 
> This is the boot log:
> 
> CFE> boot -tftp -elf
> 192.168.1.195:/brcm47xx/openwrt-brcm47xx-vmlinux-initramfs.elf
> Loader:elf Filesys:tftp Dev:eth0
> File:192.168.1.195:/brcm47xx/openwrt-brcm47xx-vmlinux-initramfs.elf
> Options:(null)
> Loading: 0x80001000/4593328 0x804626b0/279760 Entry at 0x80264800
> Closing network.
> Starting program at 0x80264800
> [    0.000000] Linux version 3.12.0-rc1+ (hauke@hauke-desktop) (gcc
> version 4.6.4 (OpenWrt/Linaro GCC 4.6-2013.05 r37948) ) #151 Tue Sep 24
> 23:35:35 CEST 2013
> [    0.000000] bootconsole [early0] enabled
> [    0.000000] CPU revision is: 00019740 (MIPS 74Kc)
> [    0.000000] bcm47xx: using bcma bus
> [    0.000000] bcma: bus0: Found chip with id 0x4716, rev 0x01 and
> package 0x0A
> [    0.000000] bcma: bus0: Core 0 found: ChipCommon (manuf 0x4BF, id
> 0x800, rev 0x1F, class 0x0)
> [    0.000000] bcma: bus0: Core 3 found: MIPS 74K (manuf 0x4A7, id
> 0x82C, rev 0x01, class 0x0)
> [    0.000000] bcma: bus0: Found M25P64 serial flash (size: 8192KiB,
> blocksize: 0x10000, blocks: 128)
> [    0.000000] bcma: bus0: Early bus registered
> [    0.000000] MIPS: machine is Netgear WNDR3400 V1
> [    0.000000] Determined physical RAM map:
> [    0.000000]  memory: 04000000 @ 00000000 (usable)
> [    0.000000] Initrd not found or empty - disabling initrd
> [    0.000000] Zone ranges:
> [    0.000000]   Normal   [mem 0x00000000-0x03ffffff]
> [    0.000000] Movable zone start for each node
> [    0.000000] Early memory node ranges
> [    0.000000]   node   0: [mem 0x00000000-0x03ffffff]
> [    0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32
> bytes.
> [    0.000000] Primary data cache 32kB, 4-way, VIPT, cache aliases,
> linesize 32 bytes
> [    0.000000] Built 1 zonelists in Zone order, mobility grouping on.
> Total pages: 16256
> [    0.000000] Kernel command line:  noinitrd console=ttyS0,115200
> [    0.000000] PID hash table entries: 256 (order: -2, 1024 bytes)
> [    0.000000] Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)
> [    0.000000] Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)

Can you please try the attached patch? This patch was made for a slightly
older tlbex.c, and seems to have missed this.

Thanks,
JC.

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diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 73d17f4..fffa7fe 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -2180,10 +2180,8 @@ static void flush_tlb_handlers(void)
 			   (unsigned long)handle_tlbs_end);
 	local_flush_icache_range((unsigned long)handle_tlbm,
 			   (unsigned long)handle_tlbm_end);
-#ifdef CONFIG_MIPS_PGD_C0_CONTEXT
 	local_flush_icache_range((unsigned long)tlbmiss_handler_setup_pgd,
 			   (unsigned long)tlbmiss_handler_setup_pgd_end);
-#endif
 }
 
 void build_tlb_refill_handler(void)