From: Ralf Baechle <ralf@linux-mips.org>
To: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org, blogic@openwrt.org
Subject: Re: [PATCH mips-for-linux-next] MIPS: check for D$ line size and CONFIG_MIPS_L1_SHIFT
Date: Thu, 23 Jan 2014 00:11:13 +0100 [thread overview]
Message-ID: <20140122231113.GE14169@linux-mips.org> (raw)
In-Reply-To: <1389812722-30035-1-git-send-email-florian@openwrt.org>
On Wed, Jan 15, 2014 at 11:05:22AM -0800, Florian Fainelli wrote:
> When a platform overrides the dcache_line_size detection in its
> cpu-features-override.h file, check that the value matches
> (1 << CONFIG_MIPS_L1_SHIFT) to ensure both settings are correct.
Conceptually wrong - the two values serve an entirely different purpose.
dcache_line_size is used for cache maintenance by the MIPS code while
CONFIG_MIPS_L1_SHIFT - which has to be a constant due to the way it's
being used - are being used to define L1_CACHE_SHIFT in <asm/cache.h>
which in turn is being used primarily to optimize the memory layout of
various structures for performance - and in case of IP27 we lie, set
L1_CACHE_SHIFT to 7 which is the size of the S-cache.
On top of that it breaks the ip27 build.
And while we're at it, the use of CONFIG_MIPS_L1_SHIFT in
arch/mips/kernel/vmlinux.lds.S is fishy - but it needs a constant and
this should be good enough for all users.
Ralf
next prev parent reply other threads:[~2014-01-22 23:11 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-15 19:05 [PATCH mips-for-linux-next] MIPS: check for D$ line size and CONFIG_MIPS_L1_SHIFT Florian Fainelli
2014-01-15 19:05 ` Florian Fainelli
2014-01-22 23:11 ` Ralf Baechle [this message]
2014-01-22 23:20 ` Florian Fainelli
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