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* PATCH[60485 Bug adding breakpoint]
@ 2014-03-22 21:47 Nick Krause
  2014-03-22 21:47 ` Nick Krause
  2014-03-24  0:19 ` Nick Krause
  0 siblings, 2 replies; 7+ messages in thread
From: Nick Krause @ 2014-03-22 21:47 UTC (permalink / raw)
  To: ralf@linux-mips.org
  Cc: linux-mips@linux-mips.org, linux-kernel@vger.kernel.org

Here is my new patch as corrected for the the bug 60845.
https://bugzilla.kernel.org/show_bug.cgi?id=60845
This is the link to the bug and my comments / conversation on to get the corrections needed.
Below is my patch for the bug, please let me know if it gets added finally .

--- linux-3.13.6/arch/mips/pci/msi-octeon.c.orig    2014-03-22 17:32:44.762754254 -0400
+++ linux-3.13.6/arch/mips/pci/msi-octeon.c    2014-03-22 17:34:19.974753699 -0400
@@ -150,6 +150,7 @@ msi_irq_allocated:
         msg.address_lo =
             ((128ul << 20) + CVMX_PCI_MSI_RCV) & 0xffffffff;
         msg.address_hi = ((128ul << 20) + CVMX_PCI_MSI_RCV)>> 32;
+        break;
     case OCTEON_DMA_BAR_TYPE_BIG:
         /* When using big bar, Bar 0 is based at 0 */
         msg.address_lo = (0 + CVMX_PCI_MSI_RCV) & 0xffffffff;
Signed-off-by: nickkrause@sympatico.ca
Nick
 		 	   		  
From macro@linux-mips.org Sat Mar 22 23:21:05 2014
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Date:   Sat, 22 Mar 2014 22:21:04 +0000 (GMT)
From:   "Maciej W. Rozycki" <macro@linux-mips.org>
To:     "Steven J. Hill" <Steven.Hill@imgtec.com>
cc:     linux-mips@linux-mips.org, Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [PATCH] MIPS: Add 1074K CPU support explicitly.
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On Fri, 17 Jan 2014, Steven J. Hill wrote:

> From: "Steven J. Hill" <Steven.Hill@imgtec.com>
> 
> The 1074K is a multiprocessing coherent processing system (CPS) based
> on modified 74K cores. This patch makes the 1074K an actual unique
> CPU type, instead of a 74K derivative, which it is not.
> 
> Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
> Reviewed-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
> ---
[...]
> diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
> index 13b549a..7184363 100644
> --- a/arch/mips/mm/c-r4k.c
> +++ b/arch/mips/mm/c-r4k.c
> @@ -1106,9 +1106,10 @@ static void probe_pcache(void)
>  	case CPU_34K:
>  	case CPU_74K:
>  	case CPU_1004K:
> +	case CPU_1074K:
>  	case CPU_INTERAPTIV:
>  	case CPU_PROAPTIV:
> -		if (current_cpu_type() == CPU_74K)
> +		if ((c->cputype == CPU_74K) || (c->cputype == CPU_1074K))
>  			alias_74k_erratum(c);
>  		if ((read_c0_config7() & (1 << 16))) {
>  			/* effectively physically indexed dcache,

 Hmm, wouldn't it make sense to avoid the repeated condition check and 
make it:

	case CPU_74K:
	case CPU_1074K:
		alias_74k_erratum(c);
		/* Fall through. */
	case CPU_M14KC:
	case CPU_M14KEC:
	case CPU_24K:
	case CPU_34K:
 	case CPU_INTERAPTIV:
 	case CPU_PROAPTIV:
 		if ((read_c0_config7() & (1 << 16))) {
 			/* effectively physically indexed dcache,
	
or suchlike instead?  Also why `c->cputype == CPU_74K' rather than 
`current_cpu_type() == CPU_74K'?

  Maciej

^ permalink raw reply	[flat|nested] 7+ messages in thread
end of thread, other threads:[~2014-03-25 16:11 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2014-03-22 21:47 PATCH[60485 Bug adding breakpoint] Nick Krause
2014-03-22 21:47 ` Nick Krause
2014-03-24  0:19 ` Nick Krause
2014-03-24  0:19   ` Nick Krause
2014-03-25  2:27   ` RESEND: PATCH[60485 Bug adding breakpoint for msi-pci] Nick Krause
2014-03-25  2:27     ` Nick Krause
2014-03-25 16:10     ` Borislav Petkov

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