* [PATCH] MIPS: Alchemy: fix db1200 PSC clock enablement
@ 2014-08-18 15:10 Manuel Lauss
2014-08-19 10:21 ` Ralf Baechle
0 siblings, 1 reply; 2+ messages in thread
From: Manuel Lauss @ 2014-08-18 15:10 UTC (permalink / raw)
To: Linux-MIPS; +Cc: Manuel Lauss
Enable PSC0 (I2C/SPI) clock and leave PSC1 (Audio) alone. This patch
restores functionality to both Audio and I2C/SPI.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
---
arch/mips/alchemy/devboards/db1200.c | 6 +-----
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/arch/mips/alchemy/devboards/db1200.c b/arch/mips/alchemy/devboards/db1200.c
index 7761889..8c13675 100644
--- a/arch/mips/alchemy/devboards/db1200.c
+++ b/arch/mips/alchemy/devboards/db1200.c
@@ -847,6 +847,7 @@ int __init db1200_dev_setup(void)
pr_warn("DB1200: cant get I2C close to 50MHz\n");
else
clk_set_rate(c, pfc);
+ clk_prepare_enable(c);
clk_put(c);
}
@@ -922,11 +923,6 @@ int __init db1200_dev_setup(void)
}
/* Audio PSC clock is supplied externally. (FIXME: platdata!!) */
- c = clk_get(NULL, "psc1_intclk");
- if (!IS_ERR(c)) {
- clk_prepare_enable(c);
- clk_put(c);
- }
__raw_writel(PSC_SEL_CLK_SERCLK,
(void __iomem *)KSEG1ADDR(AU1550_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);
wmb();
--
2.0.4
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] MIPS: Alchemy: fix db1200 PSC clock enablement
2014-08-18 15:10 [PATCH] MIPS: Alchemy: fix db1200 PSC clock enablement Manuel Lauss
@ 2014-08-19 10:21 ` Ralf Baechle
0 siblings, 0 replies; 2+ messages in thread
From: Ralf Baechle @ 2014-08-19 10:21 UTC (permalink / raw)
To: Manuel Lauss; +Cc: Linux-MIPS
On Mon, Aug 18, 2014 at 05:10:32PM +0200, Manuel Lauss wrote:
> Enable PSC0 (I2C/SPI) clock and leave PSC1 (Audio) alone. This patch
> restores functionality to both Audio and I2C/SPI.
Applied. Thanks,
Ralf
^ permalink raw reply [flat|nested] 2+ messages in thread
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