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From: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
To: <linux-mips@linux-mips.org>, <Zubair.Kakakhel@imgtec.com>,
	<geert+renesas@glider.be>, <david.daney@cavium.com>,
	<peterz@infradead.org>, <paul.gortmaker@windriver.com>,
	<davidlohr@hp.com>, <macro@linux-mips.org>, <chenhc@lemote.com>,
	<cl@linux.com>, <mingo@kernel.org>, <richard@nod.at>,
	<zajec5@gmail.com>, <james.hogan@imgtec.com>,
	<keescook@chromium.org>, <tj@kernel.org>, <alex@alex-smith.me.uk>,
	<pbonzini@redhat.com>, <blogic@openwrt.org>,
	<paul.burton@imgtec.com>, <qais.yousef@imgtec.com>,
	<linux-kernel@vger.kernel.org>, <ralf@linux-mips.org>,
	<markos.chandras@imgtec.com>, <dengcheng.zhu@imgtec.com>,
	<manuel.lauss@gmail.com>, <lars.persson@axis.com>
Subject: [PATCH v3 0/3] Series short description
Date: Tue, 2 Dec 2014 17:57:59 -0800	[thread overview]
Message-ID: <20141203015537.13886.50830.stgit@linux-yegoshin> (raw)

The following series implements an executable stack protection in MIPS.

It sets up a per-thread 'VDSO' page and appropriate TLB support.
Page is set write-protected from user and is maintained via kernel VA.
MIPS FPU emulation is shifted to new page and stack is relieved for
execute protection as is as all data pages in default setup during ELF
binary initialization. The real protection is controlled by GLIBC and
it can do stack protected now as it is done in other architectures and
I learned today that GLIBC team is ready for this.

Note: actual execute-protection depends from HW capability, of course.

This patch is required for MIPS32/64 R2 emulation on MIPS R6 architecture.
Without it 'ssh-keygen' crashes pretty fast on attempt to execute instruction
in stack.

v2 changes:
    - Added an optimization during mmap switch - doesn't switch if the same
      thread is rescheduled and other threads don't intervene (Peter Zijlstra)
    - Fixed uMIPS support (Paul Burton)
    - Added unwinding of VDSO emulation stack at signal handler invocation,
      hiding an emulation page (Andy Lutomirski note in other patch comments)

V3 change: heavy preemption friendly.

---

Leonid Yegoshin (3):
      MIPS: mips_flush_cache_range is added
      MIPS: Setup an instruction emulation in VDSO protected page instead of user stack
      MIPS: set stack/data protection as non-executable


 arch/mips/include/asm/cacheflush.h   |    3 +
 arch/mips/include/asm/fpu_emulator.h |    2 
 arch/mips/include/asm/mmu.h          |    3 +
 arch/mips/include/asm/page.h         |    2 
 arch/mips/include/asm/processor.h    |    2 
 arch/mips/include/asm/switch_to.h    |   14 +++
 arch/mips/include/asm/thread_info.h  |    3 +
 arch/mips/include/asm/tlbmisc.h      |    1 
 arch/mips/include/asm/vdso.h         |    3 +
 arch/mips/kernel/process.c           |    7 ++
 arch/mips/kernel/signal.c            |    4 +
 arch/mips/kernel/vdso.c              |   43 +++++++++-
 arch/mips/math-emu/cp1emu.c          |    8 +-
 arch/mips/math-emu/dsemul.c          |  153 ++++++++++++++++++++++++++++------
 arch/mips/mm/c-octeon.c              |    8 ++
 arch/mips/mm/c-r3k.c                 |    8 ++
 arch/mips/mm/c-r4k.c                 |   43 ++++++++++
 arch/mips/mm/c-tx39.c                |    9 ++
 arch/mips/mm/cache.c                 |    4 +
 arch/mips/mm/fault.c                 |    5 +
 arch/mips/mm/tlb-r4k.c               |   42 +++++++++
 21 files changed, 335 insertions(+), 32 deletions(-)

--
Signature

WARNING: multiple messages have this Message-ID (diff)
From: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
To: linux-mips@linux-mips.org, Zubair.Kakakhel@imgtec.com,
	geert+renesas@glider.be, david.daney@cavium.com,
	peterz@infradead.org, paul.gortmaker@windriver.com,
	davidlohr@hp.com, macro@linux-mips.org, chenhc@lemote.com,
	cl@linux.com, mingo@kernel.org, richard@nod.at, zajec5@gmail.com,
	james.hogan@imgtec.com, keescook@chromium.org, tj@kernel.org,
	alex@alex-smith.me.uk, pbonzini@redhat.com, blogic@openwrt.org,
	paul.burton@imgtec.com, qais.yousef@imgtec.com,
	linux-kernel@vger.kernel.org, ralf@linux-mips.org,
	markos.chandras@imgtec.com, dengcheng.zhu@imgtec.com,
	manuel.lauss@gmail.com, lars.persson@axis.com
Subject: [PATCH v3 0/3] Series short description
Date: Tue, 2 Dec 2014 17:57:59 -0800	[thread overview]
Message-ID: <20141203015537.13886.50830.stgit@linux-yegoshin> (raw)
Message-ID: <20141203015759.f7tK96J2Djdznp4iyHss10ZuTbXBcOGrFIQICzOAn5Q@z> (raw)

The following series implements an executable stack protection in MIPS.

It sets up a per-thread 'VDSO' page and appropriate TLB support.
Page is set write-protected from user and is maintained via kernel VA.
MIPS FPU emulation is shifted to new page and stack is relieved for
execute protection as is as all data pages in default setup during ELF
binary initialization. The real protection is controlled by GLIBC and
it can do stack protected now as it is done in other architectures and
I learned today that GLIBC team is ready for this.

Note: actual execute-protection depends from HW capability, of course.

This patch is required for MIPS32/64 R2 emulation on MIPS R6 architecture.
Without it 'ssh-keygen' crashes pretty fast on attempt to execute instruction
in stack.

v2 changes:
    - Added an optimization during mmap switch - doesn't switch if the same
      thread is rescheduled and other threads don't intervene (Peter Zijlstra)
    - Fixed uMIPS support (Paul Burton)
    - Added unwinding of VDSO emulation stack at signal handler invocation,
      hiding an emulation page (Andy Lutomirski note in other patch comments)

V3 change: heavy preemption friendly.

---

Leonid Yegoshin (3):
      MIPS: mips_flush_cache_range is added
      MIPS: Setup an instruction emulation in VDSO protected page instead of user stack
      MIPS: set stack/data protection as non-executable


 arch/mips/include/asm/cacheflush.h   |    3 +
 arch/mips/include/asm/fpu_emulator.h |    2 
 arch/mips/include/asm/mmu.h          |    3 +
 arch/mips/include/asm/page.h         |    2 
 arch/mips/include/asm/processor.h    |    2 
 arch/mips/include/asm/switch_to.h    |   14 +++
 arch/mips/include/asm/thread_info.h  |    3 +
 arch/mips/include/asm/tlbmisc.h      |    1 
 arch/mips/include/asm/vdso.h         |    3 +
 arch/mips/kernel/process.c           |    7 ++
 arch/mips/kernel/signal.c            |    4 +
 arch/mips/kernel/vdso.c              |   43 +++++++++-
 arch/mips/math-emu/cp1emu.c          |    8 +-
 arch/mips/math-emu/dsemul.c          |  153 ++++++++++++++++++++++++++++------
 arch/mips/mm/c-octeon.c              |    8 ++
 arch/mips/mm/c-r3k.c                 |    8 ++
 arch/mips/mm/c-r4k.c                 |   43 ++++++++++
 arch/mips/mm/c-tx39.c                |    9 ++
 arch/mips/mm/cache.c                 |    4 +
 arch/mips/mm/fault.c                 |    5 +
 arch/mips/mm/tlb-r4k.c               |   42 +++++++++
 21 files changed, 335 insertions(+), 32 deletions(-)

--
Signature

             reply	other threads:[~2014-12-03  1:58 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-12-03  1:57 Leonid Yegoshin [this message]
2014-12-03  1:57 ` [PATCH v3 0/3] Series short description Leonid Yegoshin
2014-12-03  1:58 ` [PATCH v3 1/3] MIPS: mips_flush_cache_range is added Leonid Yegoshin
2014-12-03  1:58   ` Leonid Yegoshin
2014-12-03  1:58 ` [PATCH v3 2/3] MIPS: Setup an instruction emulation in VDSO protected page instead of user stack Leonid Yegoshin
2014-12-03  1:58   ` Leonid Yegoshin
2014-12-03  1:58 ` [PATCH v3 3/3] MIPS: set stack/data protection as non-executable Leonid Yegoshin
2014-12-03  1:58   ` Leonid Yegoshin
2014-12-05 17:28   ` David Daney
2014-12-05 18:51     ` Kees Cook
2014-12-05 19:06       ` David Daney
2014-12-05 19:41         ` Leonid Yegoshin
2014-12-05 19:41         ` Kees Cook
2014-12-05 19:44         ` Christoph Lameter
2014-12-05 21:41           ` David Daney

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