From: Ralf Baechle <ralf@linux-mips.org>
To: Joshua Kinard <kumba@gentoo.org>
Cc: James Hogan <james.hogan@imgtec.com>,
Manuel Lauss <manuel.lauss@gmail.com>,
Leonid Yegoshin <leonid.yegoshin@imgtec.com>,
Linux-MIPS <linux-mips@linux-mips.org>
Subject: Re: [PATCH 1/2] MIPS: c-r4k: Sync icache when it fills from dcache
Date: Fri, 22 Jan 2016 15:03:04 +0100 [thread overview]
Message-ID: <20160122140303.GC1802@linux-mips.org> (raw)
In-Reply-To: <56A22936.8050601@gentoo.org>
On Fri, Jan 22, 2016 at 08:05:58AM -0500, Joshua Kinard wrote:
> > FWIW, attached is the test program I mentioned, which hits the first
> > part of this patch (flush_cache_range) via mprotect(2) and checks if
> > icache seems to have been flushed (tested on mips64r6, but should be
> > portable).
>
> Here's the output on my Octane, R14000 CPU (mips4):
>
> # ./mprotect
> Initial mprotect SUCCESS
> Looped { mprotect RW, modify, mprotect RX, test } SUCCESS
>
> This is without your patch applied. That look good? I'm assuming this CPU is
> too old to be affected. I can test with your patch after the blizzard is over
> later this weekend.
The R10000 family refills the I-cache from the S-cache so is not affected
by the scenario James' patch is for.
Ralf
next prev parent reply other threads:[~2016-01-22 14:03 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-22 10:58 [PATCH 0/2] MIPS: I6400: Avoid dcache flushes James Hogan
2016-01-22 10:58 ` James Hogan
2016-01-22 10:58 ` [PATCH 1/2] MIPS: c-r4k: Sync icache when it fills from dcache James Hogan
2016-01-22 10:58 ` James Hogan
2016-01-22 12:06 ` Manuel Lauss
2016-01-22 12:19 ` James Hogan
2016-01-22 13:05 ` Joshua Kinard
2016-01-22 13:54 ` James Hogan
2016-01-22 14:03 ` Ralf Baechle [this message]
2016-01-22 14:30 ` Manuel Lauss
2016-01-22 15:02 ` James Hogan
2016-01-22 15:55 ` Manuel Lauss
2016-01-22 10:58 ` [PATCH 2/2] MIPS: I6400: Icache " James Hogan
2016-01-22 10:58 ` James Hogan
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