From: James Hogan <james.hogan@imgtec.com>
To: Paul Burton <paul.burton@imgtec.com>
Cc: <linux-mips@linux-mips.org>, Ralf Baechle <ralf@linux-mips.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>, <linux-clk@vger.kernel.org>
Subject: Re: [PATCH v5 2/4] clk: boston: Add a driver for MIPS Boston board clocks
Date: Fri, 23 Jun 2017 23:20:25 +0100 [thread overview]
Message-ID: <20170623222025.GF31455@jhogan-linux.le.imgtec.org> (raw)
In-Reply-To: <20170617205249.1391-3-paul.burton@imgtec.com>
[-- Attachment #1: Type: text/plain, Size: 7549 bytes --]
On Sat, Jun 17, 2017 at 01:52:47PM -0700, Paul Burton wrote:
> Add a driver for the clocks provided by the MIPS Boston board from
> Imagination Technologies. 2 clocks are provided - the system clock & the
> CPU clock - and each is a simple fixed rate clock whose frequency can be
> determined by reading a register provided by the board.
>
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> Cc: Michael Turquette <mturquette@baylibre.com>
> Cc: Ralf Baechle <ralf@linux-mips.org>
> Cc: Stephen Boyd <sboyd@codeaurora.org>
> Cc: linux-clk@vger.kernel.org
> Cc: linux-mips@linux-mips.org
FWIW
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Cheers
James
>
> ---
>
> Changes in v5:
> - Use struct clk_hw rather than struct clk.
> - Comment on reasoning for use of CLK_OF_DECLARE.
> - Drop depends on OF from Kconfig.
> - Define pr_fmt to get clearer error messages.
>
> Changes in v4:
> - Adjust to expect the parent node to be the syscon.
> - Update MAINTAINERS entry.
>
> Changes in v3: None
>
> Changes in v2:
> - Support BOSTON_CLK_INPUT.
> - Register clocks with clk_register_fixed_rate during boot, removing need for clk_ops.
> - s/uint32_t/u32/.
> - Move driver to a vendor directory.
>
> MAINTAINERS | 1 +
> drivers/clk/Kconfig | 1 +
> drivers/clk/Makefile | 1 +
> drivers/clk/imgtec/Kconfig | 9 ++++
> drivers/clk/imgtec/Makefile | 1 +
> drivers/clk/imgtec/clk-boston.c | 103 ++++++++++++++++++++++++++++++++++++++++
> 6 files changed, 116 insertions(+)
> create mode 100644 drivers/clk/imgtec/Kconfig
> create mode 100644 drivers/clk/imgtec/Makefile
> create mode 100644 drivers/clk/imgtec/clk-boston.c
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 6a341862f5d6..2749877a4574 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -8503,6 +8503,7 @@ M: Paul Burton <paul.burton@imgtec.com>
> L: linux-mips@linux-mips.org
> S: Maintained
> F: Documentation/devicetree/bindings/clock/img,boston-clock.txt
> +F: drivers/clk/imgtec/clk-boston.c
> F: include/dt-bindings/clock/boston-clock.h
>
> MIROSOUND PCM20 FM RADIO RECEIVER DRIVER
> diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
> index 36cfea38135f..251a22139e73 100644
> --- a/drivers/clk/Kconfig
> +++ b/drivers/clk/Kconfig
> @@ -219,6 +219,7 @@ config COMMON_CLK_VC5
>
> source "drivers/clk/bcm/Kconfig"
> source "drivers/clk/hisilicon/Kconfig"
> +source "drivers/clk/imgtec/Kconfig"
> source "drivers/clk/mediatek/Kconfig"
> source "drivers/clk/meson/Kconfig"
> source "drivers/clk/mvebu/Kconfig"
> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
> index c19983afcb81..a4a7c5df8b93 100644
> --- a/drivers/clk/Makefile
> +++ b/drivers/clk/Makefile
> @@ -59,6 +59,7 @@ obj-y += bcm/
> obj-$(CONFIG_ARCH_BERLIN) += berlin/
> obj-$(CONFIG_H8300) += h8300/
> obj-$(CONFIG_ARCH_HISI) += hisilicon/
> +obj-y += imgtec/
> obj-$(CONFIG_ARCH_MXC) += imx/
> obj-$(CONFIG_MACH_INGENIC) += ingenic/
> obj-$(CONFIG_COMMON_CLK_KEYSTONE) += keystone/
> diff --git a/drivers/clk/imgtec/Kconfig b/drivers/clk/imgtec/Kconfig
> new file mode 100644
> index 000000000000..f6dcb748e9c4
> --- /dev/null
> +++ b/drivers/clk/imgtec/Kconfig
> @@ -0,0 +1,9 @@
> +config COMMON_CLK_BOSTON
> + bool "Clock driver for MIPS Boston boards"
> + depends on MIPS || COMPILE_TEST
> + select MFD_SYSCON
> + ---help---
> + Enable this to support the system & CPU clocks on the MIPS Boston
> + development board from Imagination Technologies. These are simple
> + fixed rate clocks whose rate is determined by reading a platform
> + provided register.
> diff --git a/drivers/clk/imgtec/Makefile b/drivers/clk/imgtec/Makefile
> new file mode 100644
> index 000000000000..ac779b8c22f2
> --- /dev/null
> +++ b/drivers/clk/imgtec/Makefile
> @@ -0,0 +1 @@
> +obj-$(CONFIG_COMMON_CLK_BOSTON) += clk-boston.o
> diff --git a/drivers/clk/imgtec/clk-boston.c b/drivers/clk/imgtec/clk-boston.c
> new file mode 100644
> index 000000000000..f18f10351785
> --- /dev/null
> +++ b/drivers/clk/imgtec/clk-boston.c
> @@ -0,0 +1,103 @@
> +/*
> + * Copyright (C) 2016-2017 Imagination Technologies
> + * Author: Paul Burton <paul.burton@imgtec.com>
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; either version 2 of the License, or (at your
> + * option) any later version.
> + */
> +
> +#define pr_fmt(fmt) "clk-boston: " fmt
> +
> +#include <linux/clk-provider.h>
> +#include <linux/kernel.h>
> +#include <linux/of.h>
> +#include <linux/regmap.h>
> +#include <linux/slab.h>
> +#include <linux/mfd/syscon.h>
> +
> +#include <dt-bindings/clock/boston-clock.h>
> +
> +#define BOSTON_PLAT_MMCMDIV 0x30
> +# define BOSTON_PLAT_MMCMDIV_CLK0DIV (0xff << 0)
> +# define BOSTON_PLAT_MMCMDIV_INPUT (0xff << 8)
> +# define BOSTON_PLAT_MMCMDIV_MUL (0xff << 16)
> +# define BOSTON_PLAT_MMCMDIV_CLK1DIV (0xff << 24)
> +
> +#define BOSTON_CLK_COUNT 3
> +
> +static u32 ext_field(u32 val, u32 mask)
> +{
> + return (val & mask) >> (ffs(mask) - 1);
> +}
> +
> +static void __init clk_boston_setup(struct device_node *np)
> +{
> + unsigned long in_freq, cpu_freq, sys_freq;
> + uint mmcmdiv, mul, cpu_div, sys_div;
> + struct clk_hw_onecell_data *onecell;
> + struct regmap *regmap;
> + struct clk_hw *hw;
> + int err;
> +
> + regmap = syscon_node_to_regmap(np->parent);
> + if (IS_ERR(regmap)) {
> + pr_err("failed to find regmap\n");
> + return;
> + }
> +
> + err = regmap_read(regmap, BOSTON_PLAT_MMCMDIV, &mmcmdiv);
> + if (err) {
> + pr_err("failed to read mmcm_div register: %d\n", err);
> + return;
> + }
> +
> + in_freq = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_INPUT) * 1000000;
> + mul = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_MUL);
> +
> + sys_div = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_CLK0DIV);
> + sys_freq = mult_frac(in_freq, mul, sys_div);
> +
> + cpu_div = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_CLK1DIV);
> + cpu_freq = mult_frac(in_freq, mul, cpu_div);
> +
> + onecell = kzalloc(sizeof(*onecell) +
> + (BOSTON_CLK_COUNT * sizeof(struct clk_hw *)),
> + GFP_KERNEL);
> + if (!onecell)
> + return;
> +
> + onecell->num = BOSTON_CLK_COUNT;
> +
> + hw = clk_hw_register_fixed_rate(NULL, "input", NULL, 0, in_freq);
> + if (IS_ERR(hw)) {
> + pr_err("failed to register input clock: %ld\n", PTR_ERR(hw));
> + return;
> + }
> + onecell->hws[BOSTON_CLK_INPUT] = hw;
> +
> + hw = clk_hw_register_fixed_rate(NULL, "sys", "input", 0, sys_freq);
> + if (IS_ERR(hw)) {
> + pr_err("failed to register sys clock: %ld\n", PTR_ERR(hw));
> + return;
> + }
> + onecell->hws[BOSTON_CLK_SYS] = hw;
> +
> + hw = clk_hw_register_fixed_rate(NULL, "cpu", "input", 0, cpu_freq);
> + if (IS_ERR(hw)) {
> + pr_err("failed to register cpu clock: %ld\n", PTR_ERR(hw));
> + return;
> + }
> + onecell->hws[BOSTON_CLK_CPU] = hw;
> +
> + err = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, onecell);
> + if (err)
> + pr_err("failed to add DT provider: %d\n", err);
> +}
> +
> +/*
> + * Use CLK_OF_DECLARE so that this driver is probed early enough to provide the
> + * CPU frequency for use with the GIC or cop0 counters/timers.
> + */
> +CLK_OF_DECLARE(clk_boston, "img,boston-clock", clk_boston_setup);
> --
> 2.13.1
>
>
[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: James Hogan <james.hogan@imgtec.com>
To: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org, Ralf Baechle <ralf@linux-mips.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
linux-clk@vger.kernel.org
Subject: Re: [PATCH v5 2/4] clk: boston: Add a driver for MIPS Boston board clocks
Date: Fri, 23 Jun 2017 23:20:25 +0100 [thread overview]
Message-ID: <20170623222025.GF31455@jhogan-linux.le.imgtec.org> (raw)
Message-ID: <20170623222025.OmYa_f2NacwwWoZ5mFLBXCAofozwGL003ZxGD2LHJbY@z> (raw)
In-Reply-To: <20170617205249.1391-3-paul.burton@imgtec.com>
[-- Attachment #1: Type: text/plain, Size: 7549 bytes --]
On Sat, Jun 17, 2017 at 01:52:47PM -0700, Paul Burton wrote:
> Add a driver for the clocks provided by the MIPS Boston board from
> Imagination Technologies. 2 clocks are provided - the system clock & the
> CPU clock - and each is a simple fixed rate clock whose frequency can be
> determined by reading a register provided by the board.
>
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> Cc: Michael Turquette <mturquette@baylibre.com>
> Cc: Ralf Baechle <ralf@linux-mips.org>
> Cc: Stephen Boyd <sboyd@codeaurora.org>
> Cc: linux-clk@vger.kernel.org
> Cc: linux-mips@linux-mips.org
FWIW
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Cheers
James
>
> ---
>
> Changes in v5:
> - Use struct clk_hw rather than struct clk.
> - Comment on reasoning for use of CLK_OF_DECLARE.
> - Drop depends on OF from Kconfig.
> - Define pr_fmt to get clearer error messages.
>
> Changes in v4:
> - Adjust to expect the parent node to be the syscon.
> - Update MAINTAINERS entry.
>
> Changes in v3: None
>
> Changes in v2:
> - Support BOSTON_CLK_INPUT.
> - Register clocks with clk_register_fixed_rate during boot, removing need for clk_ops.
> - s/uint32_t/u32/.
> - Move driver to a vendor directory.
>
> MAINTAINERS | 1 +
> drivers/clk/Kconfig | 1 +
> drivers/clk/Makefile | 1 +
> drivers/clk/imgtec/Kconfig | 9 ++++
> drivers/clk/imgtec/Makefile | 1 +
> drivers/clk/imgtec/clk-boston.c | 103 ++++++++++++++++++++++++++++++++++++++++
> 6 files changed, 116 insertions(+)
> create mode 100644 drivers/clk/imgtec/Kconfig
> create mode 100644 drivers/clk/imgtec/Makefile
> create mode 100644 drivers/clk/imgtec/clk-boston.c
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 6a341862f5d6..2749877a4574 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -8503,6 +8503,7 @@ M: Paul Burton <paul.burton@imgtec.com>
> L: linux-mips@linux-mips.org
> S: Maintained
> F: Documentation/devicetree/bindings/clock/img,boston-clock.txt
> +F: drivers/clk/imgtec/clk-boston.c
> F: include/dt-bindings/clock/boston-clock.h
>
> MIROSOUND PCM20 FM RADIO RECEIVER DRIVER
> diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
> index 36cfea38135f..251a22139e73 100644
> --- a/drivers/clk/Kconfig
> +++ b/drivers/clk/Kconfig
> @@ -219,6 +219,7 @@ config COMMON_CLK_VC5
>
> source "drivers/clk/bcm/Kconfig"
> source "drivers/clk/hisilicon/Kconfig"
> +source "drivers/clk/imgtec/Kconfig"
> source "drivers/clk/mediatek/Kconfig"
> source "drivers/clk/meson/Kconfig"
> source "drivers/clk/mvebu/Kconfig"
> diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
> index c19983afcb81..a4a7c5df8b93 100644
> --- a/drivers/clk/Makefile
> +++ b/drivers/clk/Makefile
> @@ -59,6 +59,7 @@ obj-y += bcm/
> obj-$(CONFIG_ARCH_BERLIN) += berlin/
> obj-$(CONFIG_H8300) += h8300/
> obj-$(CONFIG_ARCH_HISI) += hisilicon/
> +obj-y += imgtec/
> obj-$(CONFIG_ARCH_MXC) += imx/
> obj-$(CONFIG_MACH_INGENIC) += ingenic/
> obj-$(CONFIG_COMMON_CLK_KEYSTONE) += keystone/
> diff --git a/drivers/clk/imgtec/Kconfig b/drivers/clk/imgtec/Kconfig
> new file mode 100644
> index 000000000000..f6dcb748e9c4
> --- /dev/null
> +++ b/drivers/clk/imgtec/Kconfig
> @@ -0,0 +1,9 @@
> +config COMMON_CLK_BOSTON
> + bool "Clock driver for MIPS Boston boards"
> + depends on MIPS || COMPILE_TEST
> + select MFD_SYSCON
> + ---help---
> + Enable this to support the system & CPU clocks on the MIPS Boston
> + development board from Imagination Technologies. These are simple
> + fixed rate clocks whose rate is determined by reading a platform
> + provided register.
> diff --git a/drivers/clk/imgtec/Makefile b/drivers/clk/imgtec/Makefile
> new file mode 100644
> index 000000000000..ac779b8c22f2
> --- /dev/null
> +++ b/drivers/clk/imgtec/Makefile
> @@ -0,0 +1 @@
> +obj-$(CONFIG_COMMON_CLK_BOSTON) += clk-boston.o
> diff --git a/drivers/clk/imgtec/clk-boston.c b/drivers/clk/imgtec/clk-boston.c
> new file mode 100644
> index 000000000000..f18f10351785
> --- /dev/null
> +++ b/drivers/clk/imgtec/clk-boston.c
> @@ -0,0 +1,103 @@
> +/*
> + * Copyright (C) 2016-2017 Imagination Technologies
> + * Author: Paul Burton <paul.burton@imgtec.com>
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; either version 2 of the License, or (at your
> + * option) any later version.
> + */
> +
> +#define pr_fmt(fmt) "clk-boston: " fmt
> +
> +#include <linux/clk-provider.h>
> +#include <linux/kernel.h>
> +#include <linux/of.h>
> +#include <linux/regmap.h>
> +#include <linux/slab.h>
> +#include <linux/mfd/syscon.h>
> +
> +#include <dt-bindings/clock/boston-clock.h>
> +
> +#define BOSTON_PLAT_MMCMDIV 0x30
> +# define BOSTON_PLAT_MMCMDIV_CLK0DIV (0xff << 0)
> +# define BOSTON_PLAT_MMCMDIV_INPUT (0xff << 8)
> +# define BOSTON_PLAT_MMCMDIV_MUL (0xff << 16)
> +# define BOSTON_PLAT_MMCMDIV_CLK1DIV (0xff << 24)
> +
> +#define BOSTON_CLK_COUNT 3
> +
> +static u32 ext_field(u32 val, u32 mask)
> +{
> + return (val & mask) >> (ffs(mask) - 1);
> +}
> +
> +static void __init clk_boston_setup(struct device_node *np)
> +{
> + unsigned long in_freq, cpu_freq, sys_freq;
> + uint mmcmdiv, mul, cpu_div, sys_div;
> + struct clk_hw_onecell_data *onecell;
> + struct regmap *regmap;
> + struct clk_hw *hw;
> + int err;
> +
> + regmap = syscon_node_to_regmap(np->parent);
> + if (IS_ERR(regmap)) {
> + pr_err("failed to find regmap\n");
> + return;
> + }
> +
> + err = regmap_read(regmap, BOSTON_PLAT_MMCMDIV, &mmcmdiv);
> + if (err) {
> + pr_err("failed to read mmcm_div register: %d\n", err);
> + return;
> + }
> +
> + in_freq = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_INPUT) * 1000000;
> + mul = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_MUL);
> +
> + sys_div = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_CLK0DIV);
> + sys_freq = mult_frac(in_freq, mul, sys_div);
> +
> + cpu_div = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_CLK1DIV);
> + cpu_freq = mult_frac(in_freq, mul, cpu_div);
> +
> + onecell = kzalloc(sizeof(*onecell) +
> + (BOSTON_CLK_COUNT * sizeof(struct clk_hw *)),
> + GFP_KERNEL);
> + if (!onecell)
> + return;
> +
> + onecell->num = BOSTON_CLK_COUNT;
> +
> + hw = clk_hw_register_fixed_rate(NULL, "input", NULL, 0, in_freq);
> + if (IS_ERR(hw)) {
> + pr_err("failed to register input clock: %ld\n", PTR_ERR(hw));
> + return;
> + }
> + onecell->hws[BOSTON_CLK_INPUT] = hw;
> +
> + hw = clk_hw_register_fixed_rate(NULL, "sys", "input", 0, sys_freq);
> + if (IS_ERR(hw)) {
> + pr_err("failed to register sys clock: %ld\n", PTR_ERR(hw));
> + return;
> + }
> + onecell->hws[BOSTON_CLK_SYS] = hw;
> +
> + hw = clk_hw_register_fixed_rate(NULL, "cpu", "input", 0, cpu_freq);
> + if (IS_ERR(hw)) {
> + pr_err("failed to register cpu clock: %ld\n", PTR_ERR(hw));
> + return;
> + }
> + onecell->hws[BOSTON_CLK_CPU] = hw;
> +
> + err = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, onecell);
> + if (err)
> + pr_err("failed to add DT provider: %d\n", err);
> +}
> +
> +/*
> + * Use CLK_OF_DECLARE so that this driver is probed early enough to provide the
> + * CPU frequency for use with the GIC or cop0 counters/timers.
> + */
> +CLK_OF_DECLARE(clk_boston, "img,boston-clock", clk_boston_setup);
> --
> 2.13.1
>
>
[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
next prev parent reply other threads:[~2017-06-23 22:20 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-17 20:52 [PATCH v5 0/4] MIPS Boston support Paul Burton
2017-06-17 20:52 ` Paul Burton
2017-06-17 20:52 ` [PATCH v5 1/4] dt-bindings: Document img,boston-clock binding Paul Burton
2017-06-17 20:52 ` Paul Burton
2017-06-20 0:27 ` Stephen Boyd
2017-06-22 20:56 ` Rob Herring
2017-06-22 21:36 ` Paul Burton
2017-06-22 21:36 ` Paul Burton
2017-06-17 20:52 ` [PATCH v5 2/4] clk: boston: Add a driver for MIPS Boston board clocks Paul Burton
2017-06-17 20:52 ` Paul Burton
2017-06-20 0:26 ` Stephen Boyd
2017-06-20 16:45 ` Paul Burton
2017-06-20 16:45 ` Paul Burton
2017-06-23 22:20 ` James Hogan [this message]
2017-06-23 22:20 ` James Hogan
2017-06-17 20:52 ` [PATCH v5 3/4] MIPS: DTS: img: Don't attempt to build-in all .dtb files Paul Burton
2017-06-17 20:52 ` Paul Burton
2017-06-17 20:52 ` [PATCH v5 4/4] MIPS: generic: Support MIPS Boston development boards Paul Burton
2017-06-17 20:52 ` Paul Burton
2017-06-23 22:28 ` James Hogan
2017-06-23 22:28 ` James Hogan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20170623222025.GF31455@jhogan-linux.le.imgtec.org \
--to=james.hogan@imgtec.com \
--cc=linux-clk@vger.kernel.org \
--cc=linux-mips@linux-mips.org \
--cc=mturquette@baylibre.com \
--cc=paul.burton@imgtec.com \
--cc=ralf@linux-mips.org \
--cc=sboyd@codeaurora.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox