From: James Hogan <james.hogan@imgtec.com>
To: "Steven J. Hill" <steven.hill@cavium.com>
Cc: <linux-mips@linux-mips.org>, <ralf@linux-mips.org>
Subject: Re: [PATCH v2 01/12] MIPS: Add nudges to writes for bit unlocks.
Date: Fri, 29 Sep 2017 21:54:20 +0100 [thread overview]
Message-ID: <20170929205343.GA24591@jhogan-linux.le.imgtec.org> (raw)
In-Reply-To: <1506620053-2557-2-git-send-email-steven.hill@cavium.com>
[-- Attachment #1: Type: text/plain, Size: 892 bytes --]
Hi Steven,
On Thu, Sep 28, 2017 at 12:34:02PM -0500, Steven J. Hill wrote:
> From: Chad Reese <kreese@caviumnetworks.com>
>
> Flushing the writes lets other CPUs waiting for the lock to get it
> sooner.
>
> Signed-off-by: Chad Reese <kreese@caviumnetworks.com>
> Signed-off-by: David Daney <david.daney@cavium.com>
I think this needs your SOB too.
Cheers
James
> ---
> arch/mips/include/asm/bitops.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h
> index fa57cef..da1b871 100644
> --- a/arch/mips/include/asm/bitops.h
> +++ b/arch/mips/include/asm/bitops.h
> @@ -456,6 +456,7 @@ static inline void __clear_bit_unlock(unsigned long nr, volatile unsigned long *
> {
> smp_mb__before_llsc();
> __clear_bit(nr, addr);
> + nudge_writes();
> }
>
> /*
> --
> 2.1.4
>
>
[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: James Hogan <james.hogan@imgtec.com>
To: "Steven J. Hill" <steven.hill@cavium.com>
Cc: linux-mips@linux-mips.org, ralf@linux-mips.org
Subject: Re: [PATCH v2 01/12] MIPS: Add nudges to writes for bit unlocks.
Date: Fri, 29 Sep 2017 21:54:20 +0100 [thread overview]
Message-ID: <20170929205343.GA24591@jhogan-linux.le.imgtec.org> (raw)
Message-ID: <20170929205420.rmHtFt8922dHc3s8KfqHF18cvGMlT0-qlTHlp6JWrhs@z> (raw)
In-Reply-To: <1506620053-2557-2-git-send-email-steven.hill@cavium.com>
[-- Attachment #1: Type: text/plain, Size: 892 bytes --]
Hi Steven,
On Thu, Sep 28, 2017 at 12:34:02PM -0500, Steven J. Hill wrote:
> From: Chad Reese <kreese@caviumnetworks.com>
>
> Flushing the writes lets other CPUs waiting for the lock to get it
> sooner.
>
> Signed-off-by: Chad Reese <kreese@caviumnetworks.com>
> Signed-off-by: David Daney <david.daney@cavium.com>
I think this needs your SOB too.
Cheers
James
> ---
> arch/mips/include/asm/bitops.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h
> index fa57cef..da1b871 100644
> --- a/arch/mips/include/asm/bitops.h
> +++ b/arch/mips/include/asm/bitops.h
> @@ -456,6 +456,7 @@ static inline void __clear_bit_unlock(unsigned long nr, volatile unsigned long *
> {
> smp_mb__before_llsc();
> __clear_bit(nr, addr);
> + nudge_writes();
> }
>
> /*
> --
> 2.1.4
>
>
[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
next prev parent reply other threads:[~2017-09-29 20:54 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-28 17:34 [PATCH v2 00/12] Add Octeon Hotplug CPU Support Steven J. Hill
2017-09-28 17:34 ` [PATCH v2 01/12] MIPS: Add nudges to writes for bit unlocks Steven J. Hill
2017-09-29 20:54 ` James Hogan [this message]
2017-09-29 20:54 ` James Hogan
2017-09-28 17:34 ` [PATCH v2 02/12] MIPS: Remove unused variable 'lastpfn' Steven J. Hill
2017-09-28 17:34 ` [PATCH v2 03/12] MIPS: Allow __cpu_number_map to be larger than NR_CPUS Steven J. Hill
2017-11-07 18:29 ` James Hogan
2017-11-07 18:29 ` James Hogan
2017-09-28 17:34 ` [PATCH v2 04/12] MIPS: Octeon: Remove usage of cvmx_wait() everywhere Steven J. Hill
2017-09-28 17:34 ` [PATCH v2 05/12] MIPS: Octeon: Header and file cleaning Steven J. Hill
2017-11-07 16:11 ` James Hogan
2017-11-07 16:11 ` James Hogan
2017-11-07 18:52 ` Steven J. Hill
2017-09-28 17:34 ` [PATCH v2 06/12] MIPS: Octeon: Update CIU_FUSE registers Steven J. Hill
2017-09-28 17:34 ` [PATCH v2 07/12] MIPS: Octeon: Add Octeon III platforms for console output Steven J. Hill
2017-09-28 17:34 ` [PATCH v2 08/12] MIPS: Octeon: Remove crufty KEXEC and CRASH_DUMP code Steven J. Hill
2017-09-28 17:34 ` [PATCH v2 09/12] MIPS: Octeon: Populate kernel memory from cvmx_bootmem named blocks Steven J. Hill
2017-09-28 17:34 ` [PATCH v2 10/12] MIPS: Add the concept of BOOT_MEM_KERNEL to boot_mem_map Steven J. Hill
2017-09-28 17:34 ` [PATCH v2 11/12] MIPS: Add define for number of bits in MMUSizeExt field Steven J. Hill
2017-09-28 17:34 ` [PATCH v2 12/12] MIPS: Octeon: Add working hotplug CPU support Steven J. Hill
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20170929205343.GA24591@jhogan-linux.le.imgtec.org \
--to=james.hogan@imgtec.com \
--cc=linux-mips@linux-mips.org \
--cc=ralf@linux-mips.org \
--cc=steven.hill@cavium.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox