From: Jiaxun Yang <jiaxun.yang@flygoat.com>
To: linux-mips@vger.kernel.org
Cc: llvm@lists.linux.dev, tsbogend@alpha.franken.de,
ndesaulniers@google.com, nathan@kernel.org,
Jiaxun Yang <jiaxun.yang@flygoat.com>
Subject: [PATCH 3/5] MIPS: Detect toolchain support of workarounds in Kconfig
Date: Fri, 7 Apr 2023 11:27:19 +0100 [thread overview]
Message-ID: <20230407102721.14814-4-jiaxun.yang@flygoat.com> (raw)
In-Reply-To: <20230407102721.14814-1-jiaxun.yang@flygoat.com>
LLVM toolchain does not support most of workarounds, detect
those supports in Kconfig so we can hide unsupported workarounds
to user.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
arch/mips/Kconfig | 28 +++++++++++++++++++++++++---
arch/mips/Makefile | 6 +++---
arch/mips/cavium-octeon/Kconfig | 1 +
3 files changed, 29 insertions(+), 6 deletions(-)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 9e9de2b62f28..d896af492da6 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -371,9 +371,9 @@ config MACH_DECSTATION
select CEVT_R4K if CPU_R4X00
select CSRC_IOASIC
select CSRC_R4K if CPU_R4X00
- select CPU_DADDI_WORKAROUNDS if 64BIT
- select CPU_R4000_WORKAROUNDS if 64BIT
- select CPU_R4400_WORKAROUNDS if 64BIT
+ imply CPU_DADDI_WORKAROUNDS
+ imply CPU_R4000_WORKAROUNDS
+ imply CPU_R4400_WORKAROUNDS
select DMA_NONCOHERENT
select NO_IOPORT_MAP
select IRQ_MIPS_CPU
@@ -1723,6 +1723,7 @@ config CPU_JUMP_WORKAROUNDS
config CPU_LOONGSON2F_WORKAROUNDS
bool "Loongson 2F Workarounds"
default y
+ depends on AS_HAS_NOP_WORKAROUNDS && AS_HAS_JUMP_WORKAROUNDS
select CPU_NOP_WORKAROUNDS
select CPU_JUMP_WORKAROUNDS
help
@@ -2456,6 +2457,7 @@ config CPU_HAS_SYNC
# "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5
config CPU_DADDI_WORKAROUNDS
bool
+ depends on CPU_R4X00_BUGS64 && CC_HAS_DADDI_WORKAROUNDS
# Work around certain R4000 CPU errata (as implemented by GCC):
#
@@ -2477,6 +2479,7 @@ config CPU_DADDI_WORKAROUNDS
# erratum #52
config CPU_R4000_WORKAROUNDS
bool
+ depends on CPU_R4X00_BUGS64 && CC_HAS_R4000_WORKAROUNDS
select CPU_R4400_WORKAROUNDS
# Work around certain R4400 CPU errata (as implemented by GCC):
@@ -2487,6 +2490,7 @@ config CPU_R4000_WORKAROUNDS
# "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4
config CPU_R4400_WORKAROUNDS
bool
+ depends on CPU_R4X00_BUGS64 && CC_HAS_R4400_WORKAROUNDS
config CPU_R4X00_BUGS64
bool
@@ -3167,6 +3171,15 @@ config CC_HAS_MNO_BRANCH_LIKELY
def_bool y
depends on $(cc-option,-mno-branch-likely)
+config CC_HAS_R4000_WORKAROUNDS
+ def_bool $(cc-option,-mfix-r4000)
+
+config CC_HAS_R4400_WORKAROUNDS
+ def_bool $(cc-option,-mfix-r4400)
+
+config CC_HAS_DADDI_WORKAROUNDS
+ def_bool $(cc-option,-mno-daddi)
+
# https://github.com/llvm/llvm-project/issues/61045
config CC_HAS_BROKEN_INLINE_COMPAT_BRANCH
def_bool y if CC_IS_CLANG
@@ -3192,6 +3205,15 @@ config AS_HAS_DSP
config AS_HAS_GINV
def_bool $(cc-option,-Wa$(comma)-mginv)
+config AS_HAS_CN63XXP1_WORKAROUNDS
+ def_bool $(cc-option,-Wa$(comma)-mfix-cn63xxp1)
+
+config AS_HAS_NOP_WORKAROUNDS
+ def_bool $(cc-option,-Wa$(comma)-mfix-loongson2f-nop)
+
+config AS_HAS_JUMP_WORKAROUNDS
+ def_bool $(cc-option,-Wa$(comma)-mfix-loongson2f-jump)
+
menu "Power management options"
config ARCH_HIBERNATION_POSSIBLE
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 3aa0f9d4ceb6..344fe5f00f7b 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -193,9 +193,9 @@ cflags-$(CONFIG_CC_IS_CLANG) += -march=mips64r2
endif
cflags-$(CONFIG_CPU_LOONGSON64) += $(call cc-option,-mno-loongson-mmi)
-cflags-$(CONFIG_CPU_R4000_WORKAROUNDS) += $(call cc-option,-mfix-r4000,)
-cflags-$(CONFIG_CPU_R4400_WORKAROUNDS) += $(call cc-option,-mfix-r4400,)
-cflags-$(CONFIG_CPU_DADDI_WORKAROUNDS) += $(call cc-option,-mno-daddi,)
+cflags-$(CONFIG_CPU_R4000_WORKAROUNDS) += -mfix-r4000
+cflags-$(CONFIG_CPU_R4400_WORKAROUNDS) += -mfix-r4400
+cflags-$(CONFIG_CPU_DADDI_WORKAROUNDS) += -mno-daddi
ifdef CONFIG_CPU_LOONGSON2F_WORKAROUNDS
cflags-$(CONFIG_CPU_NOP_WORKAROUNDS) += -Wa,-mfix-loongson2f-nop
cflags-$(CONFIG_CPU_JUMP_WORKAROUNDS) += -Wa,-mfix-loongson2f-jump
diff --git a/arch/mips/cavium-octeon/Kconfig b/arch/mips/cavium-octeon/Kconfig
index 450e979ef5d9..38c9dc89cd5f 100644
--- a/arch/mips/cavium-octeon/Kconfig
+++ b/arch/mips/cavium-octeon/Kconfig
@@ -4,6 +4,7 @@ if CPU_CAVIUM_OCTEON
config CAVIUM_CN63XXP1
bool "Enable CN63XXP1 errata workarounds"
default "n"
+ depends on AS_HAS_CN63XXP1_WORKAROUNDS
help
The CN63XXP1 chip requires build time workarounds to
function reliably, select this option to enable them. These
--
2.39.2 (Apple Git-143)
next prev parent reply other threads:[~2023-04-07 10:27 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-07 10:27 [PATCH 0/5] MIPS: LLVM toolchain support for more CPUs Jiaxun Yang
2023-04-07 10:27 ` [PATCH 1/5] MIPS: Move various toolchain ASE check to Kconfig Jiaxun Yang
2023-04-07 18:57 ` Nathan Chancellor
2023-04-07 22:51 ` Jiaxun Yang
2023-04-07 10:27 ` [PATCH 2/5] MIPS: Add toolchain feature dependency for microMIPS smartMIPS Jiaxun Yang
2023-04-07 22:08 ` Nick Desaulniers
2023-04-07 10:27 ` Jiaxun Yang [this message]
2023-04-07 22:15 ` [PATCH 3/5] MIPS: Detect toolchain support of workarounds in Kconfig Nick Desaulniers
2023-04-07 10:27 ` [PATCH 4/5] MIPS: Detect toolchain support of o32 ABI with 64 bit CPU Jiaxun Yang
2023-04-07 22:19 ` Nick Desaulniers
2023-04-07 22:21 ` Nick Desaulniers
2023-04-07 22:26 ` Jiaxun Yang
2023-04-07 10:27 ` [PATCH 5/5] MIPS: Fallback CPU -march CFLAG to ISA level if unsupported Jiaxun Yang
2023-04-07 22:23 ` Nick Desaulniers
2023-04-08 9:47 ` Jiaxun Yang
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