From: Jiaxun Yang <jiaxun.yang@flygoat.com>
To: Paul Burton <paulburton@kernel.org>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org,
Jiaxun Yang <jiaxun.yang@flygoat.com>
Subject: [PATCH 2/5] MIPS: cm: Prefix probe functions with __init
Date: Tue, 07 May 2024 10:01:50 +0100 [thread overview]
Message-ID: <20240507-cm_probe-v1-2-11dbfd598f3c@flygoat.com> (raw)
In-Reply-To: <20240507-cm_probe-v1-0-11dbfd598f3c@flygoat.com>
Those functions are only used at boot time.
Prefix them with __init so they can be discarded after boot.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
arch/mips/include/asm/mips-cm.h | 4 ++--
arch/mips/kernel/mips-cm.c | 8 ++++----
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/mips/include/asm/mips-cm.h b/arch/mips/include/asm/mips-cm.h
index c2930a75b7e4..5292b516d60b 100644
--- a/arch/mips/include/asm/mips-cm.h
+++ b/arch/mips/include/asm/mips-cm.h
@@ -30,7 +30,7 @@ extern void __iomem *mips_cm_l2sync_base;
* and may be overridden by platforms which determine this address in a
* different way by defining a function with the same prototype.
*/
-extern phys_addr_t mips_cm_phys_base(void);
+extern phys_addr_t __init mips_cm_phys_base(void);
/**
* mips_cm_l2sync_phys_base - retrieve the physical base address of the CM
@@ -43,7 +43,7 @@ extern phys_addr_t mips_cm_phys_base(void);
* determine this address in a different way by defining a function with the
* same prototype.
*/
-extern phys_addr_t mips_cm_l2sync_phys_base(void);
+extern phys_addr_t __init mips_cm_l2sync_phys_base(void);
/*
* mips_cm_is64 - determine CM register width
diff --git a/arch/mips/kernel/mips-cm.c b/arch/mips/kernel/mips-cm.c
index 3a115fab5573..dddc9428fe58 100644
--- a/arch/mips/kernel/mips-cm.c
+++ b/arch/mips/kernel/mips-cm.c
@@ -179,7 +179,7 @@ static char *cm3_causes[32] = {
static DEFINE_PER_CPU_ALIGNED(spinlock_t, cm_core_lock);
static DEFINE_PER_CPU_ALIGNED(unsigned long, cm_core_lock_flags);
-phys_addr_t __weak mips_cm_phys_base(void)
+phys_addr_t __init __weak mips_cm_phys_base(void)
{
unsigned long cmgcr;
@@ -198,7 +198,7 @@ phys_addr_t __weak mips_cm_phys_base(void)
return (cmgcr & MIPS_CMGCRF_BASE) << (36 - 32);
}
-phys_addr_t __weak mips_cm_l2sync_phys_base(void)
+phys_addr_t __init __weak mips_cm_l2sync_phys_base(void)
{
u32 base_reg;
@@ -214,7 +214,7 @@ phys_addr_t __weak mips_cm_l2sync_phys_base(void)
return mips_cm_phys_base() + MIPS_CM_GCR_SIZE;
}
-static void mips_cm_probe_l2sync(void)
+static void __init mips_cm_probe_l2sync(void)
{
unsigned major_rev;
phys_addr_t addr;
@@ -237,7 +237,7 @@ static void mips_cm_probe_l2sync(void)
mips_cm_l2sync_base = ioremap(addr, MIPS_CM_L2SYNC_SIZE);
}
-int mips_cm_probe(void)
+int __init mips_cm_probe(void)
{
phys_addr_t addr;
u32 base_reg;
--
2.34.1
next prev parent reply other threads:[~2024-05-07 9:01 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-07 9:01 [PATCH 0/5] MIPS: cm: Probe GCR address from devicetree Jiaxun Yang
2024-05-07 9:01 ` [PATCH 1/5] MIPS: generic: Do __dt_setup_arch in prom_init Jiaxun Yang
2024-05-07 9:01 ` Jiaxun Yang [this message]
2024-05-07 9:01 ` [PATCH 3/5] MIPS: Move mips_cm_probe after prom_init Jiaxun Yang
2024-05-08 12:50 ` Serge Semin
2024-05-08 16:23 ` Jiaxun Yang
2024-05-07 9:01 ` [PATCH 4/5] dt-bindings: mips: Document mti,mips-cm Jiaxun Yang
2024-05-07 16:50 ` Conor Dooley
2024-05-07 18:16 ` Jiaxun Yang
2024-05-08 17:01 ` Conor Dooley
2024-05-08 20:28 ` Jiaxun Yang
2024-05-09 17:24 ` Conor Dooley
2024-05-07 9:01 ` [PATCH 5/5] MIPS: cm: Probe GCR address from DeviceTree Jiaxun Yang
2024-05-08 4:25 ` kernel test robot
2024-05-08 12:37 ` [PATCH 0/5] MIPS: cm: Probe GCR address from devicetree Serge Semin
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