[PATCH v2 1/2] dt-bindings: crypto: Add support for Mediatek MT7621 SoC

[PATCH v2 1/2] dt-bindings: crypto: Add support for Mediatek MT7621 SoC

[Aleksander Jan Bajkowski]

Add compatible for Mediatek MT7621 SoC. The implementation is exactly the
same os in the Airoha SoC.

Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
---
v2:
 - Corrected commit description
---
 .../bindings/crypto/inside-secure,safexcel-eip93.yaml          | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/crypto/inside-secure,safexcel-eip93.yaml b/Documentation/devicetree/bindings/crypto/inside-secure,safexcel-eip93.yaml
index 997bf9717f9e..8ccff64f5c1c 100644
--- a/Documentation/devicetree/bindings/crypto/inside-secure,safexcel-eip93.yaml
+++ b/Documentation/devicetree/bindings/crypto/inside-secure,safexcel-eip93.yaml
@@ -33,6 +33,9 @@ properties:
       - items:
           - const: airoha,en7581-eip93
           - const: inside-secure,safexcel-eip93ies
+      - items:
+          - const: mediatek,mt7621-eip93
+          - const: inside-secure,safexcel-eip93ies
       - items:
           - not: {}
             description: Need a SoC specific compatible
-- 
2.47.3

[PATCH v2 2/2] mips: dts: ralink: mt7621: add crypto offload support

[Aleksander Jan Bajkowski]

Add support for the built-in cryptographic accelerator. This accelerator
supports 3DES, AES (128/192/256 bit), ARC4, MD5, SHA1, SHA224, and SHA256.
It also supports full IPSEC and TLS offload, but this feature isn't
implemented in the driver.

Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
---
 arch/mips/boot/dts/ralink/mt7621.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index 0704eab4a80b..9ba28fa016fb 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -361,6 +361,14 @@ cdmm: cdmm@1fbf8000 {
 		reg = <0x1fbf8000 0x8000>;
 	};
 
+	crypto@1e004000 {
+		compatible = "mediatek,mt7621-eip93", "inside-secure,safexcel-eip93ies";
+		reg = <0x1e004000 0x1000>;
+
+		interrupt-parent = <&gic>;
+		interrupts = <GIC_SHARED 19 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
 	ethernet: ethernet@1e100000 {
 		compatible = "mediatek,mt7621-eth";
 		reg = <0x1e100000 0x10000>;
-- 
2.47.3

Re: [PATCH v2 2/2] mips: dts: ralink: mt7621: add crypto offload support

[Sergio Paracuellos]

Hi Aleksander,

On Thu, Jan 1, 2026 at 6:21 PM Aleksander Jan Bajkowski <olek2@wp.pl> wrote:
>
> Add support for the built-in cryptographic accelerator. This accelerator
> supports 3DES, AES (128/192/256 bit), ARC4, MD5, SHA1, SHA224, and SHA256.
> It also supports full IPSEC and TLS offload, but this feature isn't
> implemented in the driver.
>
> Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
> ---
>  arch/mips/boot/dts/ralink/mt7621.dtsi | 8 ++++++++
>  1 file changed, 8 insertions(+)
>
> diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
> index 0704eab4a80b..9ba28fa016fb 100644
> --- a/arch/mips/boot/dts/ralink/mt7621.dtsi
> +++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
> @@ -361,6 +361,14 @@ cdmm: cdmm@1fbf8000 {
>                 reg = <0x1fbf8000 0x8000>;
>         };
>
> +       crypto@1e004000 {
> +               compatible = "mediatek,mt7621-eip93", "inside-secure,safexcel-eip93ies";
> +               reg = <0x1e004000 0x1000>;
> +
> +               interrupt-parent = <&gic>;
> +               interrupts = <GIC_SHARED 19 IRQ_TYPE_LEVEL_HIGH>;
> +       };
> +

AFAICS, the crypto engine for mt7621 has also a clock gate[0] and a
reset line[1]. These two are not present in this binding.

[0]: https://elixir.bootlin.com/linux/v6.18.2/source/include/dt-bindings/clock/mt7621-clk.h#L36
[1]: https://elixir.bootlin.com/linux/v6.18.2/source/include/dt-bindings/reset/mt7621-reset.h#L33

Best regards,
    Sergio Paracuellos

>         ethernet: ethernet@1e100000 {
>                 compatible = "mediatek,mt7621-eth";
>                 reg = <0x1e100000 0x10000>;
> --
> 2.47.3
>

Re: [PATCH v2 2/2] mips: dts: ralink: mt7621: add crypto offload support

[Aleksander Jan Bajkowski]

Hi Sergio,

On 1/1/26 22:46, Sergio Paracuellos wrote:
> AFAICS, the crypto engine for mt7621 has also a clock gate[0] and a
> reset line[1]. These two are not present in this binding.
>
> [0]: https://elixir.bootlin.com/linux/v6.18.2/source/include/dt-bindings/clock/mt7621-clk.h#L36
> [1]: https://elixir.bootlin.com/linux/v6.18.2/source/include/dt-bindings/reset/mt7621-reset.h#L33

Will add reset and clock gate in the next iteration. It looks like
the crypto engine in AN7581 also has a clock gate[0] and reset line[1].
Just not sure if these definitions are correct.

CC: Benjamin Larsson

[0] https://elixir.bootlin.com/linux/v6.19-rc3/source/include/dt-bindings/clock/en7523-clk.h#L12
[1] https://elixir.bootlin.com/linux/v6.19-rc3/source/include/dt-bindings/reset/airoha,en7581-reset.h#L45

Re: [PATCH v2 1/2] dt-bindings: crypto: Add support for Mediatek MT7621 SoC

[Krzysztof Kozlowski]

On Thu, Jan 01, 2026 at 06:20:04PM +0100, Aleksander Jan Bajkowski wrote:
> Add compatible for Mediatek MT7621 SoC. The implementation is exactly the
> same os in the Airoha SoC.
> 
> Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
> ---
> v2:
>  - Corrected commit description
> ---
>  .../bindings/crypto/inside-secure,safexcel-eip93.yaml          | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/crypto/inside-secure,safexcel-eip93.yaml b/Documentation/devicetree/bindings/crypto/inside-secure,safexcel-eip93.yaml
> index 997bf9717f9e..8ccff64f5c1c 100644
> --- a/Documentation/devicetree/bindings/crypto/inside-secure,safexcel-eip93.yaml
> +++ b/Documentation/devicetree/bindings/crypto/inside-secure,safexcel-eip93.yaml
> @@ -33,6 +33,9 @@ properties:
>        - items:
>            - const: airoha,en7581-eip93
>            - const: inside-secure,safexcel-eip93ies
> +      - items:
> +          - const: mediatek,mt7621-eip93

Why this is not part of enum with other entry using the same fallback?

Best regards,
Krzysztof

Re: [PATCH v2 2/2] mips: dts: ralink: mt7621: add crypto offload support

[Benjamin Larsson]

On 02/01/2026 00:06, Aleksander Jan Bajkowski wrote:
> Hi Sergio,
>
> On 1/1/26 22:46, Sergio Paracuellos wrote:
>> AFAICS, the crypto engine for mt7621 has also a clock gate[0] and a
>> reset line[1]. These two are not present in this binding.
> Will add reset and clock gate in the next iteration. It looks like
> the crypto engine in AN7581 also has a clock gate[0] and reset line[1].
> Just not sure if these definitions are correct.
>
> CC: Benjamin Larsson
>
>
Hi, bit 6 seems to reset the AN7581 crypto block ie the current code 
looks ok). The irq seems to be 44 and the clock code seems to be correct 
also.

MvH

Benjamin Larsson