[PATCH 0/3] MIPS: SGI fixes

[PATCH 0/3] MIPS: SGI fixes

[Imre Kaloz]

Two fixes for the SGI O2 (IP32) and a defconfig fix for the Octane
(IP30).

Patch 1 clears CRIME errors latched before the kernel starts, which
are otherwise reported as new once the error interrupts are enabled.

Patch 2 reserves the firmware memory listed by the ARC descriptors on
IP32, which now ends up in the page allocator and CMA.

Patch 3 enables the 1-wire drivers the Bridge probe needs, and the
DS1685-family RTC driver, in ip30_defconfig, and drops four lines
that savedefconfig removes.

Tested on SGI O2 and Octane machines.

Imre Kaloz (3):
  MIPS: sgi-ip32: Clear latched CRIME errors at boot
  MIPS: sgi-ip32: Reserve the firmware memory
  MIPS: SGI-IP30: fix the defconfig defaults for the Bridge PROM and RTC

 arch/mips/configs/ip30_defconfig |  9 ++++-----
 arch/mips/fw/arc/memory.c        | 11 +++++++++--
 arch/mips/include/asm/sgialib.h  |  3 +++
 arch/mips/sgi-ip32/crime.c       |  4 ++++
 arch/mips/sgi-ip32/ip32-memory.c |  3 +++
 5 files changed, 23 insertions(+), 7 deletions(-)


base-commit: 24a19b953e2a3d0ea5a8c4951a0ab8f32720c907
-- 
2.47.3

[PATCH 1/3] MIPS: sgi-ip32: Clear latched CRIME errors at boot

[Imre Kaloz]

Errors already latched in CRIME when the kernel starts are reported as
new, as a "CRIME memory error" or a "CRIME CPU error", once the error
interrupts are enabled. Clear both status registers in crime_init().

Signed-off-by: Imre Kaloz <kaloz@kernel.org>
---
 arch/mips/sgi-ip32/crime.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/mips/sgi-ip32/crime.c b/arch/mips/sgi-ip32/crime.c
index b8a0e4cfa9ce..d9f5fe939bfe 100644
--- a/arch/mips/sgi-ip32/crime.c
+++ b/arch/mips/sgi-ip32/crime.c
@@ -34,6 +34,10 @@ void __init crime_init(void)
 	crime = ioremap(CRIME_BASE, sizeof(struct sgi_crime));
 	mace = ioremap(MACE_BASE, sizeof(struct sgi_mace));
 
+	/* Errors latched before the kernel starts would be reported as new */
+	crime->mem_error_stat = 0;
+	crime->cpu_error_stat = 0;
+
 	id = crime->id;
 	rev = id & CRIME_ID_REV;
 	id = (id & CRIME_ID_IDBITS) >> 4;
-- 
2.47.3

[PATCH 2/3] MIPS: sgi-ip32: Reserve the firmware memory

[Imre Kaloz]

ARC memory descriptors are ignored on IP32, so firmware data in low
memory ends up in the page allocator and CMA. Reserve it using the
generic ARC walk; RAM comes from CRIME, as ARC lists only the first
256 MiB.

Signed-off-by: Imre Kaloz <kaloz@kernel.org>
---
 arch/mips/fw/arc/memory.c        | 11 +++++++++--
 arch/mips/include/asm/sgialib.h  |  3 +++
 arch/mips/sgi-ip32/ip32-memory.c |  3 +++
 3 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/arch/mips/fw/arc/memory.c b/arch/mips/fw/arc/memory.c
index fb78e6fd5de4..97eb7ba02cd4 100644
--- a/arch/mips/fw/arc/memory.c
+++ b/arch/mips/fw/arc/memory.c
@@ -120,7 +120,8 @@ static int __init prom_memtype_classify(union linux_memtypes type)
 	return memtype_classify_arc(type);
 }
 
-void __weak __init prom_meminit(void)
+/* Platforms that detect RAM themselves pass add_ram = false. */
+void __init prom_mdesc_init(bool add_ram)
 {
 	struct linux_mdesc *p;
 
@@ -151,7 +152,8 @@ void __weak __init prom_meminit(void)
 		if (base < PHYS_OFFSET)
 			continue;
 
-		memblock_add(base, size);
+		if (add_ram)
+			memblock_add(base, size);
 
 		if (type == mem_reserved)
 			memblock_reserve(base, size);
@@ -169,6 +171,11 @@ void __weak __init prom_meminit(void)
 	}
 }
 
+void __weak __init prom_meminit(void)
+{
+	prom_mdesc_init(true);
+}
+
 void __weak __init prom_cleanup(void)
 {
 }
diff --git a/arch/mips/include/asm/sgialib.h b/arch/mips/include/asm/sgialib.h
index 80f900417f7e..28fd9f6fbad2 100644
--- a/arch/mips/include/asm/sgialib.h
+++ b/arch/mips/include/asm/sgialib.h
@@ -36,6 +36,9 @@ extern struct linux_mdesc *prom_getmdesc(struct linux_mdesc *curr);
  */
 extern void prom_meminit(void);
 
+/* Reserve the firmware's memory; add_ram also registers all ranges as RAM. */
+void prom_mdesc_init(bool add_ram);
+
 /* PROM device tree library routines. */
 #define PROM_NULL_COMPONENT ((pcomponent *) 0)
 
diff --git a/arch/mips/sgi-ip32/ip32-memory.c b/arch/mips/sgi-ip32/ip32-memory.c
index 5fee33744f67..eadafb98422e 100644
--- a/arch/mips/sgi-ip32/ip32-memory.c
+++ b/arch/mips/sgi-ip32/ip32-memory.c
@@ -40,4 +40,7 @@ void __init prom_meminit(void)
 			bank, base, size >> 20);
 		memblock_add(base, size);
 	}
+
+	/* ARC describes only the first 256 MiB, so RAM comes from CRIME. */
+	prom_mdesc_init(false);
 }
-- 
2.47.3

[PATCH 3/3] MIPS: SGI-IP30: fix the defconfig defaults for the Bridge PROM and RTC

[Imre Kaloz]

The Bridge probe reads its part number from the 1-wire PROM and defers
until the SGI 1-wire master and DS250x slave are present, so without
them there is no PCI bus and no serial console.

The IP30 RTC is a DS1685-family part, but the defconfig, derived from
ip27_defconfig, has the M48T35 driver, so there is no RTC.

Enable the 1-wire drivers and select the DS1685 family.

Also drop four lines that savedefconfig removes, as CRYPTO_CAMELLIA,
CRYPTO_CTS and CRYPTO_HMAC are selected built-in and IPV6_SIT=m is the
default.

Fixes: bb2d63500b5c ("MIPS: config: Add ip30_defconfig")
Signed-off-by: Imre Kaloz <kaloz@kernel.org>
---
 arch/mips/configs/ip30_defconfig | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/arch/mips/configs/ip30_defconfig b/arch/mips/configs/ip30_defconfig
index 93eb90efe06e..a8b1a492f20c 100644
--- a/arch/mips/configs/ip30_defconfig
+++ b/arch/mips/configs/ip30_defconfig
@@ -40,7 +40,6 @@ CONFIG_INET6_AH=m
 CONFIG_INET6_ESP=m
 CONFIG_INET6_IPCOMP=m
 CONFIG_IPV6_MIP6=m
-CONFIG_IPV6_SIT=m
 CONFIG_IPV6_SIT_6RD=y
 CONFIG_IPV6_TUNNEL=m
 CONFIG_IPV6_MULTIPLE_TABLES=y
@@ -129,11 +128,14 @@ CONFIG_SERIAL_8250_IOC3=y
 CONFIG_NOZOMI=m
 CONFIG_HW_RANDOM_TIMERIOMEM=m
 # CONFIG_PTP_1588_CLOCK is not set
+CONFIG_W1=y
+CONFIG_W1_MASTER_SGI=y
+CONFIG_W1_SLAVE_DS250X=y
 # CONFIG_HWMON is not set
 CONFIG_THERMAL=y
 CONFIG_SGI_MFD_IOC3=y
 CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_M48T35=y
+CONFIG_RTC_DRV_DS1685_FAMILY=y
 CONFIG_UIO=y
 CONFIG_UIO_AEC=m
 CONFIG_UIO_SERCOS3=m
@@ -162,15 +164,12 @@ CONFIG_NFS_FS=y
 CONFIG_SECURITYFS=y
 CONFIG_CRYPTO_CRYPTD=m
 CONFIG_CRYPTO_BLOWFISH=m
-CONFIG_CRYPTO_CAMELLIA=m
 CONFIG_CRYPTO_CAST5=m
 CONFIG_CRYPTO_CAST6=m
 CONFIG_CRYPTO_SERPENT=m
 CONFIG_CRYPTO_TWOFISH=m
-CONFIG_CRYPTO_CTS=m
 CONFIG_CRYPTO_LRW=m
 CONFIG_CRYPTO_XTS=m
-CONFIG_CRYPTO_HMAC=y
 CONFIG_CRYPTO_MD4=m
 CONFIG_CRYPTO_RMD160=m
 CONFIG_CRYPTO_WP512=m
-- 
2.47.3