From: Rosen Penev <rosenp@gmail.com>
To: Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
Thomas Gleixner <tglx@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Jiri Olsa <jolsa@kernel.org>, Ian Rogers <irogers@google.com>,
Adrian Hunter <adrian.hunter@intel.com>,
James Clark <james.clark@linaro.org>,
Radu Rendec <radu@rendec.net>,
linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-mips@vger.kernel.org
Subject: [PATCH 0/4] irqchip/ath79-misc: probe as a platform driver
Date: Thu, 12 Nov 2026 14:44:41 -0800 [thread overview]
Message-ID: <20261112224445.213324-1-rosenp@gmail.com> (raw)
The MISC interrupt controller of the Atheros/Qualcomm ath79 SoCs is
cascaded from a CPU interrupt, and all of its users are platform
devices. It is still initialized from IRQCHIP_DECLARE, before the early
initcalls, only because the MIPS perf code asks for the performance
counter overflow interrupt, which goes through it, from an
early_initcall.
Patch 1 makes the MIPS perf code look up that interrupt when the first
event is created, which is when it is requested. Patch 2 makes the ath79
MISC driver create the mapping at that point. Patch 3 then converts the
driver to IRQCHIP_PLATFORM_DRIVER with device-managed resources, which
also fixes the leak of the register mapping on its error path. Patch 4
adds COMPILE_TEST coverage, which a platform driver makes possible.
Patch 3 depends on patch 1: without it, perf would ask for the interrupt
before the controller has probed and would lose its overflow interrupt.
Patch 1 touches only arch/mips, so the series could go through the MIPS
tree with an ack for the irqchip patches, or through irqchip with an ack
for patch 1.
The other users of get_c0_perfcount_int() (generic/GIC, Malta, Lantiq,
Ralink) return an interrupt that is set up at boot, so calling it later
does not change anything for them. The perf boot message no longer
prints the interrupt, which is not known at that point.
Tested on a TP-Link Archer C7 v2 (QCA9558), with the device tree from
the pending series that adds it: the MISC controller probes as a
platform device, its users (UART, GPIO, watchdog) probe with nothing
left deferred, and perf record gets its samples from the overflow
interrupt on MISC 5. Each patch builds with W=1 (mips, clang), and
with patch 4 the driver also builds with W=1 for arm64, x86_64 and a
non-ath79 MIPS kernel (Lantiq).
An AI coding assistant (Claude Code, Claude Opus 5.5) was used to write
the patches, test them on the router over its serial console, and draft
the commit messages and this cover letter.
Rosen Penev (4):
MIPS: perf: look up the PMU interrupt when it is requested
irqchip/ath79-misc: map the performance counter interrupt on demand
irqchip/ath79-misc: convert to a platform driver
irqchip/ath79-misc: allow COMPILE_TEST builds
arch/mips/kernel/perf_event_mipsxx.c | 30 +++++---
drivers/irqchip/Kconfig | 14 ++++
drivers/irqchip/Makefile | 2 +-
drivers/irqchip/irq-ath79-misc.c | 108 ++++++++++++++-------------
4 files changed, 88 insertions(+), 66 deletions(-)
base-commit: aaa2f954c21b205a0bcd0961e5b2be4e82e58455
--
2.56.1
next reply other threads:[~2026-11-12 22:45 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-12 22:44 Rosen Penev [this message]
2026-11-12 22:44 ` [PATCH 1/4] MIPS: perf: look up the PMU interrupt when it is requested Rosen Penev
2026-11-12 22:44 ` [PATCH 2/4] irqchip/ath79-misc: map the performance counter interrupt on demand Rosen Penev
2026-11-12 22:44 ` [PATCH 3/4] irqchip/ath79-misc: convert to a platform driver Rosen Penev
2026-11-12 22:44 ` [PATCH 4/4] irqchip/ath79-misc: allow COMPILE_TEST builds Rosen Penev
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