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* trap handler for unaligned memory read/write
@ 2000-09-15 21:09 Jun Sun
  2000-09-15 22:31 ` Jun Sun
  2000-09-15 23:28 ` Ralf Baechle
  0 siblings, 2 replies; 4+ messages in thread
From: Jun Sun @ 2000-09-15 21:09 UTC (permalink / raw)
  To: linux-mips, linux-mips


I was trying to run some PCI ether drivers and always got bus error, at
least when I use ipconfig bootp code.

However, the problem seems to be generic.

Ethernet device writes a whole packet in the memory.  Driver and network
stack code often directly dereference a pointer in to the packet. 
However, the ether header is 14 byte long.  If you align packet from the
beginning, then IP header will be off-aligned.

Any suggestions?

If this is a valid problem, I think the long term solution should be in
network code, which should not assume they can dereference on an
unaligned address.

For short-term solutions, we can have trap handler that supports the
unaligned read/write.  Does anybody know if there is such a trap handler
for MIPS?

Thanks.

Jun

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: trap handler for unaligned memory read/write
  2000-09-15 21:09 trap handler for unaligned memory read/write Jun Sun
@ 2000-09-15 22:31 ` Jun Sun
  2000-09-15 23:28 ` Ralf Baechle
  1 sibling, 0 replies; 4+ messages in thread
From: Jun Sun @ 2000-09-15 22:31 UTC (permalink / raw)
  To: linux-mips, linux-mips; +Cc: dan


As usual, I am replying to my own question.  Maybe I was asking to soon
... :-)

I found some drivers offer an copy-only-tiny-buffer which will copy
small packets (for what purpose?).  Apparently after the copying the
misalignment disappears.  So MIPS, you just set a high copy_break_size
so that a copying always happens.

In fact this is what is done for other non-x86 architectures in tulip
drivers.

Jun

Jun Sun wrote:
> 
> I was trying to run some PCI ether drivers and always got bus error, at
> least when I use ipconfig bootp code.
> 
> However, the problem seems to be generic.
> 
> Ethernet device writes a whole packet in the memory.  Driver and network
> stack code often directly dereference a pointer in to the packet.
> However, the ether header is 14 byte long.  If you align packet from the
> beginning, then IP header will be off-aligned.
> 
> Any suggestions?
> 
> If this is a valid problem, I think the long term solution should be in
> network code, which should not assume they can dereference on an
> unaligned address.
> 
> For short-term solutions, we can have trap handler that supports the
> unaligned read/write.  Does anybody know if there is such a trap handler
> for MIPS?
> 
> Thanks.
> 
> Jun

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: trap handler for unaligned memory read/write
  2000-09-15 21:09 trap handler for unaligned memory read/write Jun Sun
  2000-09-15 22:31 ` Jun Sun
@ 2000-09-15 23:28 ` Ralf Baechle
  2000-09-16  0:02   ` Jun Sun
  1 sibling, 1 reply; 4+ messages in thread
From: Ralf Baechle @ 2000-09-15 23:28 UTC (permalink / raw)
  To: Jun Sun; +Cc: linux-mips, linux-mips

On Fri, Sep 15, 2000 at 02:09:44PM -0700, Jun Sun wrote:

> I was trying to run some PCI ether drivers and always got bus error, at
> least when I use ipconfig bootp code.
> 
> However, the problem seems to be generic.
> 
> Ethernet device writes a whole packet in the memory.  Driver and network
> stack code often directly dereference a pointer in to the packet. 
> However, the ether header is 14 byte long.  If you align packet from the
> beginning, then IP header will be off-aligned.
> 
> Any suggestions?

The strategy is to get the alignment right for the IP header, that is
to make the received packet start on a address with bit 1 set.

> If this is a valid problem, I think the long term solution should be in
> network code, which should not assume they can dereference on an
> unaligned address.

It tries to avoid unaligned accesses - if necessary even at the price of
wasting some memory.

> For short-term solutions, we can have trap handler that supports the
> unaligned read/write.  Does anybody know if there is such a trap handler
> for MIPS?

It's right there in your kernel ...

You _really_ _really_ want to avoid relying on the unaligned trap handler.
Performancewise that's equivalent to a swapping on a floppy disk on the
Mars over NFS via avian carriers ...

However unaligned accesses will result in an address error exception not
bus error therefore I suspect you've got another problem.

  Ralf

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: trap handler for unaligned memory read/write
  2000-09-15 23:28 ` Ralf Baechle
@ 2000-09-16  0:02   ` Jun Sun
  0 siblings, 0 replies; 4+ messages in thread
From: Jun Sun @ 2000-09-16  0:02 UTC (permalink / raw)
  To: Ralf Baechle; +Cc: linux-mips, linux-mips

Ralf Baechle wrote:
> > For short-term solutions, we can have trap handler that supports the
> > unaligned read/write.  Does anybody know if there is such a trap handler
> > for MIPS?
> 
> It's right there in your kernel ...
> 

Cool! I found it.

> You _really_ _really_ want to avoid relying on the unaligned trap handler.
> Performancewise that's equivalent to a swapping on a floppy disk on the
> Mars over NFS via avian carriers ...
> 
> However unaligned accesses will result in an address error exception not
> bus error therefore I suspect you've got another problem.
>

I got the error when I use gdb to debug kernel.  I suppose the gdb stub
intercepted the error and report it as BUS error.  We should make
gdb-stub a little smarter  ...

Jun

^ permalink raw reply	[flat|nested] 4+ messages in thread

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2000-09-15 21:09 trap handler for unaligned memory read/write Jun Sun
2000-09-15 22:31 ` Jun Sun
2000-09-15 23:28 ` Ralf Baechle
2000-09-16  0:02   ` Jun Sun

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