From: Jun Sun <jsun@mvista.com>
To: Ralf Baechle <ralf@oss.sgi.com>
Cc: linux-mips@oss.sgi.com
Subject: Re: missing data cache flush in trap_init?
Date: Wed, 03 Jan 2001 19:26:23 -0800 [thread overview]
Message-ID: <3A53ED5F.EC5E936F@mvista.com> (raw)
In-Reply-To: 20010103150535.B904@bacchus.dhis.org
Ralf Baechle wrote:
>
> On Tue, Jan 02, 2001 at 04:52:22PM -0800, Jun Sun wrote:
>
> > Someone reported this bug to me. I think it is a valid one. Basically
> > trap_init() installs the vectors through kseg0 address and then flushes
> > icache. It is possible that the vectors are still in the data cache and not
> > written back to memory yet. If an exception happens it may get the corrupted
> > the vector value.
> >
> > The following patch should fix it. I am not sure if I can use
> > flush_cache_range() to have potentially better performance.
>
> Flush_icache_range is correct; the function is expected to do any dcache
> writebacks etc. to make dcache / icache / memory coherent.
>
> Is it possible that you're using a CPU with additional vectors that aren't
> flushed by this flush_icache_call or?
>
> Ralf
You are right - flush_icache_range() practically flushes both caches in the
current implementation. There might be some other problems.
Aside of that, the name of flush_icache_range() seems to be misleading. Also
in general how does it know which part of dcache to flush() without a given
process mm struct? If it does not know, the only choice is to flush the whole
dcache, which seems to make this function very close to flush_all().
Is this function introduced by other CPU platforms? How would it make a
difference there? I am just curious ...
Jun
next prev parent reply other threads:[~2001-01-04 3:26 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2001-01-03 0:52 missing data cache flush in trap_init? Jun Sun
2001-01-03 11:29 ` Maciej W. Rozycki
2001-01-03 17:05 ` Ralf Baechle
2001-01-04 3:26 ` Jun Sun [this message]
2001-01-04 17:25 ` Ralf Baechle
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