* What is the maximum physical RAM for a 32bit MIPS core?
@ 2002-02-05 16:50 Steven J. Hill
2002-02-05 17:47 ` Hartvig Ekner
2002-02-06 2:33 ` Ralf Baechle
0 siblings, 2 replies; 18+ messages in thread
From: Steven J. Hill @ 2002-02-05 16:50 UTC (permalink / raw)
To: linux-mips
I am just trying to fill in some more MIPS knowledge here. With a 32-bit
MIPS processor, we are forever limited to a userspace of 2GB in size thanks
to the kuser region. kseg0/1 map the same 512MB of physical memory. kseg2
is 1GB in size and hence it could address another 1GB of RAM. So, is the
maximum amount of RAM for a 32bit MIPS core:
1) 1.5GB = 0.5GB kseg0/1 + 1.0GB kseg2
2) 4.0GB = largest 32-bit address
3) Something larger than 4.0GB by adding fancy external HW logic
Also, for choice #3, while it would be a hit in performance, could you use
the fp registers for 64-bit pointers to address larger than 4.0GB?
Thanks in advance.
-Steve
--
Steven J. Hill - Embedded SW Engineer
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: What is the maximum physical RAM for a 32bit MIPS core?
2002-02-05 16:50 What is the maximum physical RAM for a 32bit MIPS core? Steven J. Hill
@ 2002-02-05 17:47 ` Hartvig Ekner
2002-02-05 20:46 ` Steven J. Hill
2002-02-06 2:33 ` Ralf Baechle
1 sibling, 1 reply; 18+ messages in thread
From: Hartvig Ekner @ 2002-02-05 17:47 UTC (permalink / raw)
To: sjhill; +Cc: linux-mips
You have to distinguish between physical and virtual memory. The MIPS32
architecture supports implementations with up to 36 bits of physical
address space, however the virtual address space in kernel and user mode
is as you describe below.
One note: Many MIPS32 implementations choose not to implement all 36 PA
bits, but limit themselves to 32 bits. This saves a few bits in the TLB
and a few address lines.
And no to the FP thing: FP registers can only be used to hold FP values.
All addressing is done through integer registers. And any given process
can only see 2GB anyway.
/Hartvig
Steven J. Hill writes:
>
> I am just trying to fill in some more MIPS knowledge here. With a 32-bit
> MIPS processor, we are forever limited to a userspace of 2GB in size thanks
> to the kuser region. kseg0/1 map the same 512MB of physical memory. kseg2
> is 1GB in size and hence it could address another 1GB of RAM. So, is the
> maximum amount of RAM for a 32bit MIPS core:
>
> 1) 1.5GB = 0.5GB kseg0/1 + 1.0GB kseg2
>
> 2) 4.0GB = largest 32-bit address
>
> 3) Something larger than 4.0GB by adding fancy external HW logic
>
> Also, for choice #3, while it would be a hit in performance, could you use
> the fp registers for 64-bit pointers to address larger than 4.0GB?
>
> Thanks in advance.
>
> -Steve
>
> --
> Steven J. Hill - Embedded SW Engineer
>
--
_ _ _____ ____ Hartvig Ekner Mailto:hartvige@mips.com
|\ /| | |____)(____ Direct: +45 4486 5503
| \/ | | | _____) MIPS Denmark Switch: +45 4486 5555
T E C H N O L O G I E S http://www.mips.com Fax...: +45 4486 5556
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: What is the maximum physical RAM for a 32bit MIPS core?
2002-02-05 17:47 ` Hartvig Ekner
@ 2002-02-05 20:46 ` Steven J. Hill
2002-02-05 20:53 ` Hartvig Ekner
` (2 more replies)
0 siblings, 3 replies; 18+ messages in thread
From: Steven J. Hill @ 2002-02-05 20:46 UTC (permalink / raw)
To: Hartvig Ekner; +Cc: linux-mips
Hartvig Ekner wrote:
>
> You have to distinguish between physical and virtual memory. The MIPS32
> architecture supports implementations with up to 36 bits of physical
> address space, however the virtual address space in kernel and user mode
> is as you describe below.
>
I wasn't talking about the MIP32[tm] cores specifically, I was using a
generalization of 32bit. However, this is good to know. All of the data
sheets that I just downloaded from the MIPS site for the R4k[X] cores
don't mention the 36-bit PA item. Care to elaborate?
> One note: Many MIPS32 implementations choose not to implement all 36 PA
> bits, but limit themselves to 32 bits. This saves a few bits in the TLB
> and a few address lines.
>
So, if someone did want 36 PA bits on Linux, the TLB exception handlers
and a little of the page table construction/management code would have to
change. The userspace contraints and such would still remain. Cool.
-Steve
--
Steven J. Hill - Embedded SW Engineer
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: What is the maximum physical RAM for a 32bit MIPS core?
2002-02-05 20:46 ` Steven J. Hill
@ 2002-02-05 20:53 ` Hartvig Ekner
2002-02-05 20:53 ` Hartvig Ekner
2002-02-05 21:15 ` Pete Popov
2002-02-06 5:29 ` Ralf Baechle
2 siblings, 1 reply; 18+ messages in thread
From: Hartvig Ekner @ 2002-02-05 20:53 UTC (permalink / raw)
To: sjhill; +Cc: Hartvig Ekner, linux-mips
Hi,
Steven J. Hill writes:
>
> Hartvig Ekner wrote:
> >
> > You have to distinguish between physical and virtual memory. The MIPS32
> > architecture supports implementations with up to 36 bits of physical
> > address space, however the virtual address space in kernel and user mode
> > is as you describe below.
> >
> I wasn't talking about the MIP32[tm] cores specifically, I was using a
> generalization of 32bit. However, this is good to know. All of the data
> sheets that I just downloaded from the MIPS site for the R4k[X] cores
> don't mention the 36-bit PA item. Care to elaborate?
Sure. All the 4K, 4KE and 4KS families (all MIPS32 cores) from MTI only
provide 32 bits of PA. The 5K and 20K families (MIPS64 implementations)
both provide 36 bit of PA.
Also note that all of the above is only relevant for cores which have a TLB.
The low-end 4K/4KE/4KS cores all come in variants without TLB (to save
die area) and these can of course only generate 32-bits of PA regardless.
/Hartvig
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: What is the maximum physical RAM for a 32bit MIPS core?
2002-02-05 20:53 ` Hartvig Ekner
@ 2002-02-05 20:53 ` Hartvig Ekner
0 siblings, 0 replies; 18+ messages in thread
From: Hartvig Ekner @ 2002-02-05 20:53 UTC (permalink / raw)
To: sjhill; +Cc: Hartvig Ekner, linux-mips
Hi,
Steven J. Hill writes:
>
> Hartvig Ekner wrote:
> >
> > You have to distinguish between physical and virtual memory. The MIPS32
> > architecture supports implementations with up to 36 bits of physical
> > address space, however the virtual address space in kernel and user mode
> > is as you describe below.
> >
> I wasn't talking about the MIP32[tm] cores specifically, I was using a
> generalization of 32bit. However, this is good to know. All of the data
> sheets that I just downloaded from the MIPS site for the R4k[X] cores
> don't mention the 36-bit PA item. Care to elaborate?
Sure. All the 4K, 4KE and 4KS families (all MIPS32 cores) from MTI only
provide 32 bits of PA. The 5K and 20K families (MIPS64 implementations)
both provide 36 bit of PA.
Also note that all of the above is only relevant for cores which have a TLB.
The low-end 4K/4KE/4KS cores all come in variants without TLB (to save
die area) and these can of course only generate 32-bits of PA regardless.
/Hartvig
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: What is the maximum physical RAM for a 32bit MIPS core?
2002-02-05 20:46 ` Steven J. Hill
2002-02-05 20:53 ` Hartvig Ekner
@ 2002-02-05 21:15 ` Pete Popov
2002-02-05 21:24 ` Steven J. Hill
2002-02-06 5:29 ` Ralf Baechle
2 siblings, 1 reply; 18+ messages in thread
From: Pete Popov @ 2002-02-05 21:15 UTC (permalink / raw)
To: sjhill; +Cc: Hartvig Ekner, linux-mips
On Tue, 2002-02-05 at 12:46, Steven J. Hill wrote:
> Hartvig Ekner wrote:
> >
> > You have to distinguish between physical and virtual memory. The MIPS32
> > architecture supports implementations with up to 36 bits of physical
> > address space, however the virtual address space in kernel and user mode
> > is as you describe below.
> >
> I wasn't talking about the MIP32[tm] cores specifically, I was using a
> generalization of 32bit. However, this is good to know. All of the data
> sheets that I just downloaded from the MIPS site for the R4k[X] cores
> don't mention the 36-bit PA item. Care to elaborate?
>
> > One note: Many MIPS32 implementations choose not to implement all 36 PA
> > bits, but limit themselves to 32 bits. This saves a few bits in the TLB
> > and a few address lines.
> >
> So, if someone did want 36 PA bits on Linux, the TLB exception handlers
> and a little of the page table construction/management code would have to
> change. The userspace contraints and such would still remain. Cool.
I'm not sure if it's a "little" though. Ralf has already done the work
for 64bit memory support on 32bit kernels, but that only works currently
on 64bit CPUs. I started hacking on the 64bit memory patch to get it to
work on 32bit processors, but had to put that aside for a few weeks. I
hope to get back to it soon.
Pete
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: What is the maximum physical RAM for a 32bit MIPS core?
2002-02-05 21:15 ` Pete Popov
@ 2002-02-05 21:24 ` Steven J. Hill
2002-02-05 21:44 ` Pete Popov
2002-02-05 21:58 ` Bradley D. LaRonde
0 siblings, 2 replies; 18+ messages in thread
From: Steven J. Hill @ 2002-02-05 21:24 UTC (permalink / raw)
To: Pete Popov; +Cc: Hartvig Ekner, linux-mips
Pete Popov wrote:
>
> I'm not sure if it's a "little" though. Ralf has already done the work
> for 64bit memory support on 32bit kernels, but that only works currently
> on 64bit CPUs. I started hacking on the 64bit memory patch to get it to
> work on 32bit processors, but had to put that aside for a few weeks. I
> hope to get back to it soon.
>
Sure, the "little" is a relative term. As far as your patch is concerned,
you are essentially trying to use a true 32-bit processor (my definition
being that it is not a 64-bit processor running in 32-bit mode), to address
address more than 4GB of physical memory. I don't see how that is possible
with just the MMU and TLB unless you are using chip selects and customm
logic.
-Steve
--
Steven J. Hill - Embedded SW Engineer
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: What is the maximum physical RAM for a 32bit MIPS core?
2002-02-05 21:24 ` Steven J. Hill
@ 2002-02-05 21:44 ` Pete Popov
2002-02-05 21:58 ` Bradley D. LaRonde
1 sibling, 0 replies; 18+ messages in thread
From: Pete Popov @ 2002-02-05 21:44 UTC (permalink / raw)
To: sjhill; +Cc: Hartvig Ekner, linux-mips
On Tue, 2002-02-05 at 13:24, Steven J. Hill wrote:
> Pete Popov wrote:
> >
> > I'm not sure if it's a "little" though. Ralf has already done the work
> > for 64bit memory support on 32bit kernels, but that only works currently
> > on 64bit CPUs. I started hacking on the 64bit memory patch to get it to
> > work on 32bit processors, but had to put that aside for a few weeks. I
> > hope to get back to it soon.
> >
> Sure, the "little" is a relative term. As far as your patch is concerned,
> you are essentially trying to use a true 32-bit processor (my definition
> being that it is not a 64-bit processor running in 32-bit mode), to address
> address more than 4GB of physical memory. I don't see how that is possible
> with just the MMU and TLB unless you are using chip selects and customm
> logic.
I failed to mention that the additional patch, once working, would be
for MIPS32 (as in the MIPS Tech's MIPS32 spec, not just any 32 bit CPU)
CPUs that implemented the full 36 bit physical address space. So the
support really won't be 64bit, it will be 36bit.
Pete
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: What is the maximum physical RAM for a 32bit MIPS core?
2002-02-05 21:24 ` Steven J. Hill
2002-02-05 21:44 ` Pete Popov
@ 2002-02-05 21:58 ` Bradley D. LaRonde
2002-02-05 21:58 ` Bradley D. LaRonde
2002-02-06 8:49 ` Geert Uytterhoeven
1 sibling, 2 replies; 18+ messages in thread
From: Bradley D. LaRonde @ 2002-02-05 21:58 UTC (permalink / raw)
To: sjhill; +Cc: linux-mips
----- Original Message -----
From: "Steven J. Hill" <sjhill@cotw.com>
To: "Pete Popov" <ppopov@pacbell.net>
Cc: "Hartvig Ekner" <hartvige@mips.com>; "linux-mips"
<linux-mips@oss.sgi.com>
Sent: Tuesday, February 05, 2002 4:24 PM
Subject: Re: What is the maximum physical RAM for a 32bit MIPS core?
> Pete Popov wrote:
> >
> > I'm not sure if it's a "little" though. Ralf has already done the work
> > for 64bit memory support on 32bit kernels, but that only works currently
> > on 64bit CPUs. I started hacking on the 64bit memory patch to get it to
> > work on 32bit processors, but had to put that aside for a few weeks. I
> > hope to get back to it soon.
> >
> Sure, the "little" is a relative term. As far as your patch is concerned,
> you are essentially trying to use a true 32-bit processor (my definition
> being that it is not a 64-bit processor running in 32-bit mode), to
address
> address more than 4GB of physical memory. I don't see how that is possible
> with just the MMU and TLB unless you are using chip selects and customm
> logic.
As already mentioned, a MIPS TLB entry typically can point with 36 bits
(that's 67TB of address space?) at physical memory. If you have more than
2^31 bytes of physical memory, then a single process can't map all of
physical memory into it's address space, but it can map in pages (using TLB
entries) from anywhere within the 36-bit physical memory space.
In other words, process address space doesn't limit physical address space.
Only TLB capability limits physical address space.
And right, KSEG0 and KSEG1 can only get at the low 0.5GB of physical memory.
You can imagine that KSEG0 is implemented with a single hardwired TLB entry
that maps virtual address 0x80000000 to physical address 0x0, 0.5GB wide.
The only way to get to physical memory above 0.5GB is through a TLB entry.
Regards,
Brad
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: What is the maximum physical RAM for a 32bit MIPS core?
2002-02-05 21:58 ` Bradley D. LaRonde
@ 2002-02-05 21:58 ` Bradley D. LaRonde
2002-02-06 8:49 ` Geert Uytterhoeven
1 sibling, 0 replies; 18+ messages in thread
From: Bradley D. LaRonde @ 2002-02-05 21:58 UTC (permalink / raw)
To: sjhill; +Cc: linux-mips
----- Original Message -----
From: "Steven J. Hill" <sjhill@cotw.com>
To: "Pete Popov" <ppopov@pacbell.net>
Cc: "Hartvig Ekner" <hartvige@mips.com>; "linux-mips"
<linux-mips@oss.sgi.com>
Sent: Tuesday, February 05, 2002 4:24 PM
Subject: Re: What is the maximum physical RAM for a 32bit MIPS core?
> Pete Popov wrote:
> >
> > I'm not sure if it's a "little" though. Ralf has already done the work
> > for 64bit memory support on 32bit kernels, but that only works currently
> > on 64bit CPUs. I started hacking on the 64bit memory patch to get it to
> > work on 32bit processors, but had to put that aside for a few weeks. I
> > hope to get back to it soon.
> >
> Sure, the "little" is a relative term. As far as your patch is concerned,
> you are essentially trying to use a true 32-bit processor (my definition
> being that it is not a 64-bit processor running in 32-bit mode), to
address
> address more than 4GB of physical memory. I don't see how that is possible
> with just the MMU and TLB unless you are using chip selects and customm
> logic.
As already mentioned, a MIPS TLB entry typically can point with 36 bits
(that's 67TB of address space?) at physical memory. If you have more than
2^31 bytes of physical memory, then a single process can't map all of
physical memory into it's address space, but it can map in pages (using TLB
entries) from anywhere within the 36-bit physical memory space.
In other words, process address space doesn't limit physical address space.
Only TLB capability limits physical address space.
And right, KSEG0 and KSEG1 can only get at the low 0.5GB of physical memory.
You can imagine that KSEG0 is implemented with a single hardwired TLB entry
that maps virtual address 0x80000000 to physical address 0x0, 0.5GB wide.
The only way to get to physical memory above 0.5GB is through a TLB entry.
Regards,
Brad
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: What is the maximum physical RAM for a 32bit MIPS core?
2002-02-05 21:58 ` Bradley D. LaRonde
2002-02-05 21:58 ` Bradley D. LaRonde
@ 2002-02-06 8:49 ` Geert Uytterhoeven
2002-02-06 11:16 ` nick
2002-02-06 14:14 ` Bradley D. LaRonde
1 sibling, 2 replies; 18+ messages in thread
From: Geert Uytterhoeven @ 2002-02-06 8:49 UTC (permalink / raw)
To: Bradley D. LaRonde; +Cc: sjhill, linux-mips
On Tue, 5 Feb 2002, Bradley D. LaRonde wrote:
> As already mentioned, a MIPS TLB entry typically can point with 36 bits
> (that's 67TB of address space?) at physical memory. If you have more than
At bit less: 64 GiB or approx. 69 GB :-)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: What is the maximum physical RAM for a 32bit MIPS core?
2002-02-06 8:49 ` Geert Uytterhoeven
@ 2002-02-06 11:16 ` nick
2002-02-06 12:07 ` Geert Uytterhoeven
2002-02-06 14:14 ` Bradley D. LaRonde
1 sibling, 1 reply; 18+ messages in thread
From: nick @ 2002-02-06 11:16 UTC (permalink / raw)
Cc: linux-mips
The fact that idiot marketoids in some moronic HD maker decided "GB" ment
"billion bytes" is not a good excuse for useing the term to refer to
anything that has never been polluted this way. It's not an excuse to use
it to refer to things that have been polluted this way either, but that
won't stop ppl. How bout you say GB is gigabits and claim ~549 of your
mythical "GB"?
Nick
On Wed, 6 Feb 2002, Geert Uytterhoeven wrote:
> On Tue, 5 Feb 2002, Bradley D. LaRonde wrote:
> > As already mentioned, a MIPS TLB entry typically can point with 36 bits
> > (that's 67TB of address space?) at physical memory. If you have more than
>
> At bit less: 64 GiB or approx. 69 GB :-)
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
>
^ permalink raw reply [flat|nested] 18+ messages in thread* Re: What is the maximum physical RAM for a 32bit MIPS core?
2002-02-06 11:16 ` nick
@ 2002-02-06 12:07 ` Geert Uytterhoeven
0 siblings, 0 replies; 18+ messages in thread
From: Geert Uytterhoeven @ 2002-02-06 12:07 UTC (permalink / raw)
To: nick; +Cc: linux-mips
On Wed, 6 Feb 2002 nick@snowman.net wrote:
> The fact that idiot marketoids in some moronic HD maker decided "GB" ment
> "billion bytes" is not a good excuse for useing the term to refer to
> anything that has never been polluted this way. It's not an excuse to use
> it to refer to things that have been polluted this way either, but that
> won't stop ppl. How bout you say GB is gigabits and claim ~549 of your
> mythical "GB"?
Then I would say `Gb' (lower case b).
> On Wed, 6 Feb 2002, Geert Uytterhoeven wrote:
> > On Tue, 5 Feb 2002, Bradley D. LaRonde wrote:
> > > As already mentioned, a MIPS TLB entry typically can point with 36 bits
> > > (that's 67TB of address space?) at physical memory. If you have more than
> >
> > At bit less: 64 GiB or approx. 69 GB :-)
But the main issue here was: tera vs. giga.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: What is the maximum physical RAM for a 32bit MIPS core?
2002-02-06 8:49 ` Geert Uytterhoeven
2002-02-06 11:16 ` nick
@ 2002-02-06 14:14 ` Bradley D. LaRonde
2002-02-06 14:14 ` Bradley D. LaRonde
1 sibling, 1 reply; 18+ messages in thread
From: Bradley D. LaRonde @ 2002-02-06 14:14 UTC (permalink / raw)
To: Geert Uytterhoeven; +Cc: sjhill, linux-mips
----- Original Message -----
From: "Geert Uytterhoeven" <geert@linux-m68k.org>
To: "Bradley D. LaRonde" <brad@ltc.com>
Cc: <sjhill@cotw.com>; "linux-mips" <linux-mips@oss.sgi.com>
Sent: Wednesday, February 06, 2002 3:49 AM
Subject: Re: What is the maximum physical RAM for a 32bit MIPS core?
> On Tue, 5 Feb 2002, Bradley D. LaRonde wrote:
> > As already mentioned, a MIPS TLB entry typically can point with 36 bits
> > (that's 67TB of address space?) at physical memory. If you have more
than
>
> At bit less: 64 GiB or approx. 69 GB :-)
Oops, yeah. 67TB seemed a little high. :-P
Regards,
Brad
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: What is the maximum physical RAM for a 32bit MIPS core?
2002-02-06 14:14 ` Bradley D. LaRonde
@ 2002-02-06 14:14 ` Bradley D. LaRonde
0 siblings, 0 replies; 18+ messages in thread
From: Bradley D. LaRonde @ 2002-02-06 14:14 UTC (permalink / raw)
To: Geert Uytterhoeven; +Cc: sjhill, linux-mips
----- Original Message -----
From: "Geert Uytterhoeven" <geert@linux-m68k.org>
To: "Bradley D. LaRonde" <brad@ltc.com>
Cc: <sjhill@cotw.com>; "linux-mips" <linux-mips@oss.sgi.com>
Sent: Wednesday, February 06, 2002 3:49 AM
Subject: Re: What is the maximum physical RAM for a 32bit MIPS core?
> On Tue, 5 Feb 2002, Bradley D. LaRonde wrote:
> > As already mentioned, a MIPS TLB entry typically can point with 36 bits
> > (that's 67TB of address space?) at physical memory. If you have more
than
>
> At bit less: 64 GiB or approx. 69 GB :-)
Oops, yeah. 67TB seemed a little high. :-P
Regards,
Brad
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: What is the maximum physical RAM for a 32bit MIPS core?
2002-02-05 20:46 ` Steven J. Hill
2002-02-05 20:53 ` Hartvig Ekner
2002-02-05 21:15 ` Pete Popov
@ 2002-02-06 5:29 ` Ralf Baechle
2 siblings, 0 replies; 18+ messages in thread
From: Ralf Baechle @ 2002-02-06 5:29 UTC (permalink / raw)
To: Steven J. Hill; +Cc: Hartvig Ekner, linux-mips
On Tue, Feb 05, 2002 at 02:46:31PM -0600, Steven J. Hill wrote:
> > One note: Many MIPS32 implementations choose not to implement all 36 PA
> > bits, but limit themselves to 32 bits. This saves a few bits in the TLB
> > and a few address lines.
> >
> So, if someone did want 36 PA bits on Linux, the TLB exception handlers
> and a little of the page table construction/management code would have to
> change. The userspace contraints and such would still remain. Cool.
Basically the whole code is already in place except a few bugs fixes that
still need to go in.
Ralf
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: What is the maximum physical RAM for a 32bit MIPS core?
2002-02-05 16:50 What is the maximum physical RAM for a 32bit MIPS core? Steven J. Hill
2002-02-05 17:47 ` Hartvig Ekner
@ 2002-02-06 2:33 ` Ralf Baechle
2002-02-06 13:17 ` William Lee Irwin III
1 sibling, 1 reply; 18+ messages in thread
From: Ralf Baechle @ 2002-02-06 2:33 UTC (permalink / raw)
To: Steven J. Hill; +Cc: linux-mips
On Tue, Feb 05, 2002 at 10:50:20AM -0600, Steven J. Hill wrote:
> I am just trying to fill in some more MIPS knowledge here. With a 32-bit
> MIPS processor, we are forever limited to a userspace of 2GB in size thanks
> to the kuser region. kseg0/1 map the same 512MB of physical memory. kseg2
> is 1GB in size and hence it could address another 1GB of RAM. So, is the
2gb virtual memory per process. In theory physical memory is limited by
the size of the address bus with highmem; the practical limit for highmem
should be in the range of 16-32gb RAM.
Ralf
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: What is the maximum physical RAM for a 32bit MIPS core?
2002-02-06 2:33 ` Ralf Baechle
@ 2002-02-06 13:17 ` William Lee Irwin III
0 siblings, 0 replies; 18+ messages in thread
From: William Lee Irwin III @ 2002-02-06 13:17 UTC (permalink / raw)
To: Ralf Baechle; +Cc: Steven J. Hill, linux-mips
On Tue, Feb 05, 2002 at 10:50:20AM -0600, Steven J. Hill wrote:
>> I am just trying to fill in some more MIPS knowledge here. With a 32-bit
>> MIPS processor, we are forever limited to a userspace of 2GB in size thanks
>> to the kuser region. kseg0/1 map the same 512MB of physical memory. kseg2
>> is 1GB in size and hence it could address another 1GB of RAM. So, is the
On Wed, Feb 06, 2002 at 03:33:46AM +0100, Ralf Baechle wrote:
> 2gb virtual memory per process. In theory physical memory is limited by
> the size of the address bus with highmem; the practical limit for highmem
> should be in the range of 16-32gb RAM.
I'm aware that some of those issues have to do with boot-time allocations
proportional to memory size filling the direct-mapped portion of the kernel
virtual address space. Do you have in mind others? I'm just generally
curious.
Thanks,
Bill
^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2002-02-06 19:18 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2002-02-05 16:50 What is the maximum physical RAM for a 32bit MIPS core? Steven J. Hill
2002-02-05 17:47 ` Hartvig Ekner
2002-02-05 20:46 ` Steven J. Hill
2002-02-05 20:53 ` Hartvig Ekner
2002-02-05 20:53 ` Hartvig Ekner
2002-02-05 21:15 ` Pete Popov
2002-02-05 21:24 ` Steven J. Hill
2002-02-05 21:44 ` Pete Popov
2002-02-05 21:58 ` Bradley D. LaRonde
2002-02-05 21:58 ` Bradley D. LaRonde
2002-02-06 8:49 ` Geert Uytterhoeven
2002-02-06 11:16 ` nick
2002-02-06 12:07 ` Geert Uytterhoeven
2002-02-06 14:14 ` Bradley D. LaRonde
2002-02-06 14:14 ` Bradley D. LaRonde
2002-02-06 5:29 ` Ralf Baechle
2002-02-06 2:33 ` Ralf Baechle
2002-02-06 13:17 ` William Lee Irwin III
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