Re: mips32_flush_cache routine corrupts CP0_STATUS with gcc-2.96

[Carsten Langgaard <carstenl@mips.com>]

"Gleb O. Raiko" wrote:

> Carsten Langgaard wrote:
> >
> > "Gleb O. Raiko" wrote:
> > > Basically, requirement of uncached run makes hadrware logic much simpler
> > > and allows  to save silicon a bit.
> >
> > That could be true, but then again I suggest making specific cache routines for those
> > CPUs.
> > It would be a real performance hit for the rest of us, if we have to operate from
> > uncached space.
> >
>
> In theory, yes, there is a performance penalty. In practice, I doubt
> this penalty is significant. Sure, Linux likes to flush cahces, not to
> say more. But, did somebody measure the penalty of uncached runs? Even
> with microbencnmarks like lmbench.

Yes, I have tried running linux this way, because I wanted to eliminate the reason I sow
cache problems on one of our tests chip, was due to execute the cache operating
instruction from cached space.
I didn't thought it was that big a penalty, because you are flushing the cache anyway, but
I didn't had to run any benchmarks, so obviously was it when I booted my system.


>
> Regards,
> Gleb.

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