[PATCH] Cobalt interrupthandler fix

[PATCH] Cobalt interrupthandler fix

[Karsten Merker]

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Hallo,

the Cobalt NASRaQ (as well as other RaQ models) has the problem of freezing
when there is activity on the serial port and on the ethernet at the same
time. Peter de Schrijver has tracked this down to a bug in the interrupt
handler. The handler currently does not check whether an interrupt is masked
and calls the handling routine for _every_ interrupt, not only for those
that are not masked out currently.

The following patch fixes this. Ralf, could you please apply the fix
to the CVS?

Regards,
Karsten
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diff -Nur linux/arch/mips/cobalt/int-handler.S linux-cobalt/arch/mips/cobalt/int-handler.S
--- linux/arch/mips/cobalt/int-handler.S	Fri Sep 13 21:21:58 2002
+++ linux-cobalt/arch/mips/cobalt/int-handler.S	Tue Dec 31 22:26:18 2002
@@ -30,7 +30,9 @@
 		/*
 		 * Get pending Interrupts
 		 */
-		mfc0	s0,CP0_CAUSE	# get irq mask
+		mfc0	s0,CP0_CAUSE	# get raw irq status
+		mfc0	a0,CP0_STATUS	# get irq mask
+		and	s0,s0,a0	# compute masked irq status
 
 		andi	a0,s0,CAUSEF_IP2	/* Check for Galileo timer */
 		beq	a0,zero,1f

Re: [PATCH] Cobalt interrupthandler fix

[Liam Davies]

Karsten Merker wrote:
> Hallo,
> 
> the Cobalt NASRaQ (as well as other RaQ models) has the problem of freezing
> when there is activity on the serial port and on the ethernet at the same
> time. Peter de Schrijver has tracked this down to a bug in the interrupt
> handler. The handler currently does not check whether an interrupt is masked
> and calls the handling routine for _every_ interrupt, not only for those
> that are not masked out currently.
> 
> The following patch fixes this. Ralf, could you please apply the fix
> to the CVS?
Good find, applied to CVS. The patch works great here!


Liam

Re: [PATCH] Cobalt interrupthandler fix

[Greg Lindahl]

On Fri, Jan 24, 2003 at 03:15:24PM +0100, Karsten Merker wrote:

> the Cobalt NASRaQ (as well as other RaQ models) has the problem of freezing
> when there is activity on the serial port and on the ethernet at the same
> time. Peter de Schrijver has tracked this down to a bug in the interrupt
> handler. The handler currently does not check whether an interrupt is masked
> and calls the handling routine for _every_ interrupt, not only for those
> that are not masked out currently.

While we're at it:

[lindahl@fileserver mips]$ find . -name "*int-hand*" | xargs grep -L CP0_STATUS
./jmr3927/rbhma3100/int-handler.S
./philips/nino/int-handler.S

The philips case seems to have the same bug.

The jmr3927 thingie is hard to understand, so I can't tell if it has
the same bug or not.

-- greg

hidden bug in 32 bit kernel ejtag

[Greg Lindahl]

While inspecting the 2.4 cvs kernel, I saw that arch/mips/kernel/head.S
does not have a .align for ejtag_debug_buffer -- just a ".fill 4".
The alignment happens to be correct, I guess since it's the first
.data segment item in the file, but anyone rearranging the code could
trigger a misalignment, which causes an unaligned trap inside an
exception... try debugging that one. (OK, I got lucky...)

The 64 bit cvs kernel doesn't yet have this ejtag stuff in it. 2.5
looks the same as 2.4.

-- greg