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* C0 config reg for 5k core
@ 2003-08-11 18:28 David Kesselring
  2003-08-11 19:32 ` Mike Uhler
  2003-08-12 11:21 ` Chris Dearman
  0 siblings, 2 replies; 6+ messages in thread
From: David Kesselring @ 2003-08-11 18:28 UTC (permalink / raw)
  To: linux-mips

Has anyone else built linux 2.4 for a 5k or 5kf core? When comparing cpu.h
and the MIPS64 5K Processor Core Family Software Users Manual it doesn't
look to me that the c0-config1 reg is defined the same way. Am I reading
something wrong? For example in the spec FPU flag is bit0 while in cpu.h
it is bit4. Seems pretty basic.

David Kesselring
Atmel MMC
dkesselr@mmc.atmel.com
919-462-6587

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: C0 config reg for 5k core
  2003-08-11 18:28 C0 config reg for 5k core David Kesselring
@ 2003-08-11 19:32 ` Mike Uhler
  2003-08-11 19:57   ` David Kesselring
  2003-08-12 11:21 ` Chris Dearman
  1 sibling, 1 reply; 6+ messages in thread
From: Mike Uhler @ 2003-08-11 19:32 UTC (permalink / raw)
  To: David Kesselring; +Cc: linux-mips

Bit 0 of Config1 is FPU-present.  Bit 4 is "Performance counters
present".  I guarantee you that the 5K family implements this
pattern.

/gmu


On Mon, 2003-08-11 at 11:28, David Kesselring wrote:
> Has anyone else built linux 2.4 for a 5k or 5kf core? When comparing cpu.h
> and the MIPS64 5K Processor Core Family Software Users Manual it doesn't
> look to me that the c0-config1 reg is defined the same way. Am I reading
> something wrong? For example in the spec FPU flag is bit0 while in cpu.h
> it is bit4. Seems pretty basic.
> 
> David Kesselring
> Atmel MMC
> dkesselr@mmc.atmel.com
> 919-462-6587
-- 

Michael Uhler, Chief Technology Officer
MIPS Technologies, Inc.  Email: uhler@mips.com  Pager:uhler_p@mips.com
1225 Charleston Road     Voice:  (650)567-5025  FAX:   (650)567-5225
Mountain View, CA 94043  Mobile: (650)868-6870  Admin: (650)567-5085

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: C0 config reg for 5k core
  2003-08-11 19:32 ` Mike Uhler
@ 2003-08-11 19:57   ` David Kesselring
  2003-08-11 20:00     ` Mike Uhler
  0 siblings, 1 reply; 6+ messages in thread
From: David Kesselring @ 2003-08-11 19:57 UTC (permalink / raw)
  To: Mike Uhler; +Cc: linux-mips

Is this reg, supposed to be the same among all processor or does it
differ?

On 11 Aug 2003, Mike Uhler wrote:

> Bit 0 of Config1 is FPU-present.  Bit 4 is "Performance counters
> present".  I guarantee you that the 5K family implements this
> pattern.
>
> /gmu
>
>
> On Mon, 2003-08-11 at 11:28, David Kesselring wrote:
> > Has anyone else built linux 2.4 for a 5k or 5kf core? When comparing cpu.h
> > and the MIPS64 5K Processor Core Family Software Users Manual it doesn't
> > look to me that the c0-config1 reg is defined the same way. Am I reading
> > something wrong? For example in the spec FPU flag is bit0 while in cpu.h
> > it is bit4. Seems pretty basic.
> >
> > David Kesselring
> > Atmel MMC
> > dkesselr@mmc.atmel.com
> > 919-462-6587
> --
>
> Michael Uhler, Chief Technology Officer
> MIPS Technologies, Inc.  Email: uhler@mips.com  Pager:uhler_p@mips.com
> 1225 Charleston Road     Voice:  (650)567-5025  FAX:   (650)567-5225
> Mountain View, CA 94043  Mobile: (650)868-6870  Admin: (650)567-5085
>
>
>
>

David Kesselring
Atmel MMC
dkesselr@mmc.atmel.com
919-462-6587

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: C0 config reg for 5k core
  2003-08-11 19:57   ` David Kesselring
@ 2003-08-11 20:00     ` Mike Uhler
  0 siblings, 0 replies; 6+ messages in thread
From: Mike Uhler @ 2003-08-11 20:00 UTC (permalink / raw)
  To: David Kesselring; +Cc: linux-mips

For MIPS32 and MIPS64 processors (the 5K is MIPS64), it is
architecturally defined and required, and the compatibility
verification testing verifies it (and, yes, we do run compatibility
verification testing on our own cores).

/gmu

On Mon, 2003-08-11 at 12:57, David Kesselring wrote:
> Is this reg, supposed to be the same among all processor or does it
> differ?
> 
> On 11 Aug 2003, Mike Uhler wrote:
> 
> > Bit 0 of Config1 is FPU-present.  Bit 4 is "Performance counters
> > present".  I guarantee you that the 5K family implements this
> > pattern.
> >
> > /gmu
> >
> >
> > On Mon, 2003-08-11 at 11:28, David Kesselring wrote:
> > > Has anyone else built linux 2.4 for a 5k or 5kf core? When comparing cpu.h
> > > and the MIPS64 5K Processor Core Family Software Users Manual it doesn't
> > > look to me that the c0-config1 reg is defined the same way. Am I reading
> > > something wrong? For example in the spec FPU flag is bit0 while in cpu.h
> > > it is bit4. Seems pretty basic.
> > >
> > > David Kesselring
> > > Atmel MMC
> > > dkesselr@mmc.atmel.com
> > > 919-462-6587
> > --
> >
> > Michael Uhler, Chief Technology Officer
> > MIPS Technologies, Inc.  Email: uhler@mips.com  Pager:uhler_p@mips.com
> > 1225 Charleston Road     Voice:  (650)567-5025  FAX:   (650)567-5225
> > Mountain View, CA 94043  Mobile: (650)868-6870  Admin: (650)567-5085
> >
> >
> >
> >
> 
> David Kesselring
> Atmel MMC
> dkesselr@mmc.atmel.com
> 919-462-6587
-- 

Michael Uhler, Chief Technology Officer
MIPS Technologies, Inc.  Email: uhler@mips.com  Pager:uhler_p@mips.com
1225 Charleston Road     Voice:  (650)567-5025  FAX:   (650)567-5225
Mountain View, CA 94043  Mobile: (650)868-6870  Admin: (650)567-5085

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: C0 config reg for 5k core
  2003-08-11 18:28 C0 config reg for 5k core David Kesselring
  2003-08-11 19:32 ` Mike Uhler
@ 2003-08-12 11:21 ` Chris Dearman
  2003-08-12 12:39   ` David Kesselring
  1 sibling, 1 reply; 6+ messages in thread
From: Chris Dearman @ 2003-08-12 11:21 UTC (permalink / raw)
  To: David Kesselring; +Cc: linux-mips

David Kesselring wrote:
> Has anyone else built linux 2.4 for a 5k or 5kf core? When comparing cpu.h

   I have :)

> and the MIPS64 5K Processor Core Family Software Users Manual it doesn't
> look to me that the c0-config1 reg is defined the same way. Am I reading
> something wrong? For example in the spec FPU flag is bit0 while in cpu.h
> it is bit4. Seems pretty basic.

   The option bits defined in cpu.h are software flags.  See 
arch/mips/kernel/setup.c where these flags are set for each processor by 
reading appropriate registers.

	Regards
		Chris

-- 
Chris Dearman          The Fruit Farm, Ely Road    voice +44 1223 706206
MIPS Technologies (UK) Chittering, Cambs, CB5 9PH  fax   +44 1223 706250

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: C0 config reg for 5k core
  2003-08-12 11:21 ` Chris Dearman
@ 2003-08-12 12:39   ` David Kesselring
  0 siblings, 0 replies; 6+ messages in thread
From: David Kesselring @ 2003-08-12 12:39 UTC (permalink / raw)
  To: linux-mips

I see what is going on now. Thanks.

On Tue, 12 Aug 2003, Chris Dearman wrote:

> David Kesselring wrote:
> > Has anyone else built linux 2.4 for a 5k or 5kf core? When comparing cpu.h
>
>    I have :)
>
> > and the MIPS64 5K Processor Core Family Software Users Manual it doesn't
> > look to me that the c0-config1 reg is defined the same way. Am I reading
> > something wrong? For example in the spec FPU flag is bit0 while in cpu.h
> > it is bit4. Seems pretty basic.
>
>    The option bits defined in cpu.h are software flags.  See
> arch/mips/kernel/setup.c where these flags are set for each processor by
> reading appropriate registers.
>
> 	Regards
> 		Chris
>
> --
> Chris Dearman          The Fruit Farm, Ely Road    voice +44 1223 706206
> MIPS Technologies (UK) Chittering, Cambs, CB5 9PH  fax   +44 1223 706250
>
>
>

David Kesselring
Atmel MMC
dkesselr@mmc.atmel.com
919-462-6587

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2003-08-12 12:39 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2003-08-11 18:28 C0 config reg for 5k core David Kesselring
2003-08-11 19:32 ` Mike Uhler
2003-08-11 19:57   ` David Kesselring
2003-08-11 20:00     ` Mike Uhler
2003-08-12 11:21 ` Chris Dearman
2003-08-12 12:39   ` David Kesselring

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