From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: Binbin Zhou <zhoubb@lemote.com>, Ralf Baechle <ralf@linux-mips.org>
Cc: John Crispin <john@phrozen.org>,
"Steven J . Hill" <Steven.Hill@imgtec.com>,
linux-mips@linux-mips.org, Fuxin Zhang <zhangfx@lemote.com>,
Zhangjin Wu <wuzhangjin@gmail.com>,
Kelvin Cheung <keguang.zhang@gmail.com>,
Yang Ling <gnaygnil@gmail.com>, HuaCai Chen <chenhc@lemote.com>
Subject: Re: [PATCH v4 1/8] MIPS: Loongson: Merge RPID macro for Loongson-1A/1B/1C
Date: Tue, 7 Feb 2017 12:26:20 +0300 [thread overview]
Message-ID: <3d751d79-d60c-e3f1-ebb9-1538820ae8ed@cogentembedded.com> (raw)
In-Reply-To: <1486452550-10721-2-git-send-email-zhoubb@lemote.com>
Hello!
On 2/7/2017 10:29 AM, Binbin Zhou wrote:
> The Loongson-1 series CPUs(1A/1B/1C) share the same RPID macro.
Maybe PRID?
> Signed-off-by: Binbin Zhou <zhoubb@lemote.com>
> Signed-off-by: HuaCai Chen <chenhc@lemote.com>
[...]
MBR, Sergei
next prev parent reply other threads:[~2017-02-07 9:26 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-07 7:29 [PATCH v4 0/8] MIPS: Loongson: Add the Loongson-1A processor support Binbin Zhou
2017-02-07 7:29 ` [PATCH v4 1/8] MIPS: Loongson: Merge RPID macro for Loongson-1A/1B/1C Binbin Zhou
2017-02-07 9:26 ` Sergei Shtylyov [this message]
2017-02-07 7:29 ` [PATCH v4 2/8] MIPS: Loongson: Expand Loongson-1's register definition Binbin Zhou
2017-02-07 7:29 ` [PATCH v4 3/8] MIPS: Loongson: Add basic Loongson-1A CPU support Binbin Zhou
2017-02-07 7:29 ` [PATCH v4 4/8] MIPS: Loongson: Add Loongson-1A Kconfig options Binbin Zhou
2017-02-07 7:29 ` [PATCH v4 5/8] MIPS: Loongson: Add platform devices for Loongson-1A Binbin Zhou
2017-02-07 7:29 ` [PATCH v4 6/8] MIPS: Loongson: Add Loongson-1A board support Binbin Zhou
2017-02-07 7:29 ` [PATCH v4 7/8] clk: Loongson: Add Loongson-1A clock support Binbin Zhou
2017-02-07 7:29 ` [PATCH v4 8/8] MIPS: Loongson: Add Loongson-1A default config file Binbin Zhou
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