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From: "Lijun Chen" <chenli@nortelnetworks.com>
To: linux-mips@linux-mips.org
Subject: exception priority for BCM1250
Date: Tue, 30 Mar 2004 17:47:41 -0500	[thread overview]
Message-ID: <4069F90D.9060903@americasm01.nt.com> (raw)

Hi,

Does anybody know which mips family SB1 core on bcm1250 falls into?
It is a MIPS64 processor, does it belong to 5K family or 20Kc?

What about the exception priorities, such as cache error exception, bus 
error
exception, and so on? Are they maskable or non-maskable? It is not clear 
from
BCM1250 and sb1 core manuals.

Thanks a lot.

Lijun

             reply	other threads:[~2004-03-30 22:47 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2004-03-30 22:47 Lijun Chen [this message]
2004-03-30 23:38 ` exception priority for BCM1250 Lijun Chen
2004-03-30 23:41   ` Ralf Baechle
2004-03-30 23:43 ` Ralf Baechle
2004-03-31  8:35 ` Dominic Sweetman
2004-03-31 15:39   ` Lijun Chen
2004-03-31 18:19     ` Jun Sun
2004-03-31 20:26       ` Lijun Chen

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