* problem about dma
@ 2004-12-20 3:46 wuming
2004-12-20 3:46 ` wuming
2004-12-20 8:43 ` Gleb O. Raiko
0 siblings, 2 replies; 6+ messages in thread
From: wuming @ 2004-12-20 3:46 UTC (permalink / raw)
To: linux-mips
In file include/asm-mips/pci.h
there are some functions for dma if the I/O model is non-coherent.
for example:
pci_map_sg
pci_unmap_sg
These two functions exist for ide dma.
Before the dma transfer, pci_map_sg will map the memory space covered by sg_table,
and it will flush and invalidate cache indexed by that memory space.
After the dma transfer, pci_unmap_sg also needs to be called to flush and invalidate
the same cache. But I do not know why the second flush will be demanded.
I think that in the interval between the two flush, there would be nothing to access
the memory covered by the dma. But it is not the case.
I want to know what can access that memory and I need some help.
^ permalink raw reply [flat|nested] 6+ messages in thread* problem about dma
2004-12-20 3:46 problem about dma wuming
@ 2004-12-20 3:46 ` wuming
2004-12-20 8:43 ` Gleb O. Raiko
1 sibling, 0 replies; 6+ messages in thread
From: wuming @ 2004-12-20 3:46 UTC (permalink / raw)
To: linux-mips
In file include/asm-mips/pci.h
there are some functions for dma if the I/O model is non-coherent.
for example:
pci_map_sg
pci_unmap_sg
These two functions exist for ide dma.
Before the dma transfer, pci_map_sg will map the memory space covered by sg_table,
and it will flush and invalidate cache indexed by that memory space.
After the dma transfer, pci_unmap_sg also needs to be called to flush and invalidate
the same cache. But I do not know why the second flush will be demanded.
I think that in the interval between the two flush, there would be nothing to access
the memory covered by the dma. But it is not the case.
I want to know what can access that memory and I need some help.
^ permalink raw reply [flat|nested] 6+ messages in thread* Re: problem about dma
2004-12-20 3:46 problem about dma wuming
2004-12-20 3:46 ` wuming
@ 2004-12-20 8:43 ` Gleb O. Raiko
2004-12-20 9:51 ` wuming
1 sibling, 1 reply; 6+ messages in thread
From: Gleb O. Raiko @ 2004-12-20 8:43 UTC (permalink / raw)
To: wuming; +Cc: linux-mips
wuming wrote:
> Before the dma transfer, pci_map_sg will map the memory space covered by sg_table,
> and it will flush and invalidate cache indexed by that memory space.
> After the dma transfer, pci_unmap_sg also needs to be called to flush and invalidate
> the same cache. But I do not know why the second flush will be demanded.
> I think that in the interval between the two flush, there would be nothing to access
> the memory covered by the dma. But it is not the case.
> I want to know what can access that memory and I need some help.
In 2.4, memcpy's prefetch may (and, in practice, do, no smiles, it cost
me a lot of time to realize) access that memory. I though it has been
fixed in 2.6 someday.
Regards,
Gleb.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: problem about dma
2004-12-20 8:43 ` Gleb O. Raiko
@ 2004-12-20 9:51 ` wuming
2004-12-20 9:51 ` wuming
2004-12-20 13:14 ` Fuxin Zhang
0 siblings, 2 replies; 6+ messages in thread
From: wuming @ 2004-12-20 9:51 UTC (permalink / raw)
To: linux-mips
----- Original Message -----
From: "Gleb O. Raiko" <raiko@niisi.msk.ru>
To: "wuming" <wuming@ict.ac.cn>
Cc: <linux-mips@linux-mips.org>
Sent: Monday, December 20, 2004 4:43 PM
Subject: Re: problem about dma
> In 2.4, memcpy's prefetch may (and, in practice, do, no smiles, it cost
> me a lot of time to realize) access that memory. I though it has been
> fixed in 2.6 someday.
>
> Regards,
> Gleb.
>
Thank you! :)
But I think it is not the only reason, because the CPU on my platform does not
support the "pref" instruction. So, memcpy's prefetch may have no effect on that
arrange of memory.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: problem about dma
2004-12-20 9:51 ` wuming
@ 2004-12-20 9:51 ` wuming
2004-12-20 13:14 ` Fuxin Zhang
1 sibling, 0 replies; 6+ messages in thread
From: wuming @ 2004-12-20 9:51 UTC (permalink / raw)
To: linux-mips
----- Original Message -----
From: "Gleb O. Raiko" <raiko@niisi.msk.ru>
To: "wuming" <wuming@ict.ac.cn>
Cc: <linux-mips@linux-mips.org>
Sent: Monday, December 20, 2004 4:43 PM
Subject: Re: problem about dma
> In 2.4, memcpy's prefetch may (and, in practice, do, no smiles, it cost
> me a lot of time to realize) access that memory. I though it has been
> fixed in 2.6 someday.
>
> Regards,
> Gleb.
>
Thank you! :)
But I think it is not the only reason, because the CPU on my platform does not
support the "pref" instruction. So, memcpy's prefetch may have no effect on that
arrange of memory.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: problem about dma
2004-12-20 9:51 ` wuming
2004-12-20 9:51 ` wuming
@ 2004-12-20 13:14 ` Fuxin Zhang
1 sibling, 0 replies; 6+ messages in thread
From: Fuxin Zhang @ 2004-12-20 13:14 UTC (permalink / raw)
To: wuming; +Cc: linux-mips
I think that speculative loads may be the answer.
wuming wrote:
>----- Original Message -----
>From: "Gleb O. Raiko" <raiko@niisi.msk.ru>
>To: "wuming" <wuming@ict.ac.cn>
>Cc: <linux-mips@linux-mips.org>
>Sent: Monday, December 20, 2004 4:43 PM
>Subject: Re: problem about dma
>
>
>
>
>>In 2.4, memcpy's prefetch may (and, in practice, do, no smiles, it cost
>>me a lot of time to realize) access that memory. I though it has been
>>fixed in 2.6 someday.
>>
>>Regards,
>>Gleb.
>>
>>
>>
>Thank you! :)
>But I think it is not the only reason, because the CPU on my platform does not
>support the "pref" instruction. So, memcpy's prefetch may have no effect on that
>arrange of memory.
>
>
>
^ permalink raw reply [flat|nested] 6+ messages in thread
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2004-12-20 3:46 problem about dma wuming
2004-12-20 3:46 ` wuming
2004-12-20 8:43 ` Gleb O. Raiko
2004-12-20 9:51 ` wuming
2004-12-20 9:51 ` wuming
2004-12-20 13:14 ` Fuxin Zhang
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