Misc. AMD DBAu1550 fixes

[Sergei Shtylylov <sshtylyov@ru.mvista.com>]

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Hello.

     Here's a couple of DBAu1550 fixes: the first one fixes BCSR accesses in
the board setup/reset code (the registers are actually 16-bit, and their
addresses are different between DBAu1550 and other DBAu1xx0 boards), the
second one just selects the proper machine type for DBAu1550.

WBR, Sergei




[-- Attachment #2: db1550-bcsr-fix.patch --]
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Index: linux/arch/mips/au1000/db1x00/board_setup.c
===================================================================
--- linux.orig/arch/mips/au1000/db1x00/board_setup.c
+++ linux/arch/mips/au1000/db1x00/board_setup.c
@@ -45,13 +45,12 @@
 #include <asm/mach-au1x00/au1000.h>
 #include <asm/mach-db1x00/db1x00.h>
 
-/* not correct for db1550 */
-static BCSR * const bcsr = (BCSR *)0xAE000000;
+static BCSR * const bcsr = (BCSR *)BCSR_KSEG1_ADDR;
 
 void board_reset (void)
 {
 	/* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
-	au_writel(0x00000000, 0xAE00001C);
+	bcsr->swreset = 0x0000);
 }
 
 void __init board_setup(void)
@@ -75,7 +75,7 @@ void __init board_setup(void)
 	bcsr->resets |= BCSR_RESETS_IRDA_MODE_OFF;
 	au_sync();
 #endif
-	au_writel(0, 0xAE000010); /* turn off pcmcia power */
+	bcsr->pcmcia = 0x0000; /* turn off PCMCIA power */
 
 #ifdef CONFIG_MIPS_MIRAGE
 	/* enable GPIO[31:0] inputs */





[-- Attachment #3: db1550-platform.patch --]
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Index: linux/arch/mips/au1000/db1x00/init.c
===================================================================
--- linux.orig/arch/mips/au1000/db1x00/init.c
+++ linux/arch/mips/au1000/db1x00/init.c
@@ -61,7 +61,11 @@ void __init prom_init(void)
 	prom_envp = (char **) fw_arg2;
 
 	mips_machgroup = MACH_GROUP_ALCHEMY;
-	mips_machtype = MACH_DB1000;	/* set the platform # */
+#ifdef CONFIG_MIPS_DB1550
+	mips_machtype = MACH_DB1550;
+#else
+ 	mips_machtype = MACH_DB1000;	/* set the platform # */
+#endif
 
 	prom_init_cmdline();