From: Sergei Shtylylov <sshtylyov@ru.mvista.com>
To: Linux MIPS <linux-mips@linux-mips.org>
Cc: ralf@linux-mips.org, Jordan Crouse <jordan.crouse@amd.com>
Subject: [PATCH] Au1xx0: really set KSEG0 to uncached on reboot
Date: Wed, 25 Jan 2006 21:27:10 +0300 [thread overview]
Message-ID: <43D7C2FE.2090407@ru.mvista.com> (raw)
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Hello.
Resending with signoffs...
Just found really old buglet in AMD Au1xx0 restart code: instead of
modifying the whole CP0 Config.K0 field to 010b (meaning KSEG0 uncached)
before flushing the caches and resetting a board, it only sets bit 1 of that
reg. which is effectively a NOP since Config.K0 == 011b as the kernel sets it
up (which is also its default value for Au1xx0).
WBR, Sergei
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
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diff --git a/arch/mips/au1000/common/reset.c b/arch/mips/au1000/common/reset.c
index 65b84db..4ffcced 100644
--- a/arch/mips/au1000/common/reset.c
+++ b/arch/mips/au1000/common/reset.c
@@ -151,7 +151,7 @@ void au1000_restart(char *command)
}
set_c0_status(ST0_BEV | ST0_ERL);
- set_c0_config(CONF_CM_UNCACHED);
+ change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
flush_cache_all();
write_c0_wired(0);
next reply other threads:[~2006-01-25 18:19 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-01-25 18:27 Sergei Shtylylov [this message]
-- strict thread matches above, loose matches on Subject: below --
2006-02-06 8:10 [PATCH] Au1xx0: really set KSEG0 to uncached on reboot David Sanchez
2006-02-06 8:10 ` David Sanchez
2006-01-30 14:10 David Sanchez
2006-01-30 14:10 ` David Sanchez
2006-02-04 0:25 ` Sergei Shtylylov
2006-01-17 18:54 Sergei Shtylylov
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