* [PATCH 2/3] fixed typo in hazard.h
2006-09-21 16:07 [PATCH 1/3] fixed mtc0_tlbw_hazard Yoichi Yuasa
@ 2006-09-21 16:10 ` Yoichi Yuasa
2006-09-21 16:13 ` [PATCH 3/3] remove some redefinitions " Yoichi Yuasa
2006-09-25 14:49 ` [PATCH 2/3] fixed typo " Ralf Baechle
2006-09-21 16:22 ` [PATCH 1/3] fixed mtc0_tlbw_hazard Sergei Shtylyov
` (2 subsequent siblings)
3 siblings, 2 replies; 14+ messages in thread
From: Yoichi Yuasa @ 2006-09-21 16:10 UTC (permalink / raw)
To: Ralf Baechle; +Cc: yoichi_yuasa, linux-mips
This patch has fixed typo in hazard.h .
Yoichi
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/hazards.h mips/include/asm-mips/hazards.h
--- mips-orig/include/asm-mips/hazards.h 2006-09-22 00:00:36.145536750 +0900
+++ mips/include/asm-mips/hazards.h 2006-09-22 00:01:17.699349000 +0900
@@ -11,7 +11,7 @@
#define _ASM_HAZARDS_H
-#ifdef __ASSEMBLER__
+#ifdef __ASSEMBLY__
#define ASMMACRO(name, code...) .macro name; code; .endm
#else
^ permalink raw reply [flat|nested] 14+ messages in thread* [PATCH 3/3] remove some redefinitions in hazard.h
2006-09-21 16:10 ` [PATCH 2/3] fixed typo in hazard.h Yoichi Yuasa
@ 2006-09-21 16:13 ` Yoichi Yuasa
2006-09-25 15:14 ` Ralf Baechle
2006-09-25 14:49 ` [PATCH 2/3] fixed typo " Ralf Baechle
1 sibling, 1 reply; 14+ messages in thread
From: Yoichi Yuasa @ 2006-09-21 16:13 UTC (permalink / raw)
To: Ralf Baechle; +Cc: yoichi_yuasa, linux-mips
This patch has removed some redefinitions in hazard.h .
Yoichi
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/hazards.h mips/include/asm-mips/hazards.h
--- mips-orig/include/asm-mips/hazards.h 2006-09-22 00:17:58.189227000 +0900
+++ mips/include/asm-mips/hazards.h 2006-09-22 00:13:46.893522000 +0900
@@ -191,22 +191,4 @@ ASMMACRO(back_to_back_c0_hazard,
#endif
-#ifndef __ASSEMBLY__
-
-/* C access to assembler macros */
-#define mtc0_tlbw_hazard() \
- __asm__ __volatile__("mtc0_tlbw_hazard")
-#define tlbw_use_hazard() \
- __asm__ __volatile__("tlbw_use_hazard")
-#define tlb_probe_hazard() \
- __asm__ __volatile__("tlb_probe_hazard")
-#define irq_enable_hazard() \
- __asm__ __volatile__("irq_enable_hazard")
-#define irq_disable_hazard() \
- __asm__ __volatile__("irq_disable_hazard")
-#define back_to_back_c0_hazard() \
- __asm__ __volatile__("back_to_back_c0_hazard")
-
-#endif /* __ASSEMBLY__ */
-
#endif /* _ASM_HAZARDS_H */
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH 2/3] fixed typo in hazard.h
2006-09-21 16:10 ` [PATCH 2/3] fixed typo in hazard.h Yoichi Yuasa
2006-09-21 16:13 ` [PATCH 3/3] remove some redefinitions " Yoichi Yuasa
@ 2006-09-25 14:49 ` Ralf Baechle
1 sibling, 0 replies; 14+ messages in thread
From: Ralf Baechle @ 2006-09-25 14:49 UTC (permalink / raw)
To: Yoichi Yuasa; +Cc: linux-mips
On Fri, Sep 22, 2006 at 01:10:48AM +0900, Yoichi Yuasa wrote:
> This patch has fixed typo in hazard.h .
> -#ifdef __ASSEMBLER__
> +#ifdef __ASSEMBLY__
Not a typo at all - the gcc driver defines __ASSEMBLER__ for MIPS. But
for clarity's sake I think this change is the right thing to do, so
I've just changed a few other files as well.
Ralf
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/3] fixed mtc0_tlbw_hazard
2006-09-21 16:07 [PATCH 1/3] fixed mtc0_tlbw_hazard Yoichi Yuasa
2006-09-21 16:10 ` [PATCH 2/3] fixed typo in hazard.h Yoichi Yuasa
@ 2006-09-21 16:22 ` Sergei Shtylyov
2006-09-21 16:41 ` Yoichi Yuasa
2006-09-22 5:16 ` Atsushi Nemoto
2006-09-25 14:24 ` Ralf Baechle
3 siblings, 1 reply; 14+ messages in thread
From: Sergei Shtylyov @ 2006-09-21 16:22 UTC (permalink / raw)
To: Yoichi Yuasa; +Cc: Ralf Baechle, linux-mips
Hello.
Yoichi Yuasa wrote:
> Some mtc0_tlbw_hazard() were broken by "[MIPS] Cleanup hazard handling" patch.
> Please apply this patch.
> tlb-r4k.o disassemble:
> 8009018c <local_flush_tlb_all>:
> 8009018c: 40066000 mfc0 a2,$12
> 80090190: 34c1001f ori at,a2,0x1f
> 80090194: 3821001f xori at,at,0x1f
> 80090198: 40816000 mtc0 at,$12
> 8009019c: 00000040 ssnop
> 800901a0: 00000040 ssnop
> 800901a4: 00000040 ssnop
Hm, why there are ssnop's here...
> 800901a8: 40075000 mfc0 a3,$10
> 800901ac: 40801000 mtc0 zero,$2
> 800901b0: 40801800 mtc0 zero,$3
> 800901b4: 40043000 mfc0 a0,$6
> 800901b8: 3c028035 lui v0,0x8035
> 800901bc: 8c457ac0 lw a1,31424(v0)
> 800901c0: 0085182a slt v1,a0,a1
> 800901c4: 1060000b beqz v1,800901f4 <local_flush_tlb_all+0x68>
> 800901c8: 00044340 sll t0,a0,0xd
> 800901cc: 3c098000 lui t1,0x8000
> 800901d0: 01091821 addu v1,t0,t1
> 800901d4: 40835000 mtc0 v1,$10
> 800901d8: 10000002 b 800901e4 <local_flush_tlb_all+0x58> <-- mtc0_tlbw_hazard()
> 800901dc: 40840000 mtc0 a0,$0
> 800901e0: 42000002 tlbwi
>
> Yoichi
>
> Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
>
> diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/hazards.h mips/include/asm-mips/hazards.h
> --- mips-orig/include/asm-mips/hazards.h 2006-09-21 18:21:11.793973750 +0900
> +++ mips/include/asm-mips/hazards.h 2006-09-21 18:55:07.569201750 +0900
> @@ -138,7 +138,7 @@ ASMMACRO(back_to_back_c0_hazard,
> * Mostly like R4000 for historic reasons
> */
> ASMMACRO(mtc0_tlbw_hazard,
> - b . + 8
> + nop; nop; nop; nop; nop; nop
... and nop's there? This looks inconsistent.
> )
> ASMMACRO(tlbw_use_hazard,
> nop; nop; nop; nop; nop; nop
> @@ -169,7 +169,7 @@ ASMMACRO(back_to_back_c0_hazard,
> * processors.
> */
> ASMMACRO(mtc0_tlbw_hazard,
> - b . + 8
> + nop; nop; nop; nop; nop; nop
> )
> ASMMACRO(tlbw_use_hazard,
> nop; nop; nop; nop; nop; nop
WBR, Sergei
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH 1/3] fixed mtc0_tlbw_hazard
2006-09-21 16:22 ` [PATCH 1/3] fixed mtc0_tlbw_hazard Sergei Shtylyov
@ 2006-09-21 16:41 ` Yoichi Yuasa
2006-09-21 17:01 ` Sergei Shtylyov
2006-09-25 14:26 ` Ralf Baechle
0 siblings, 2 replies; 14+ messages in thread
From: Yoichi Yuasa @ 2006-09-21 16:41 UTC (permalink / raw)
To: Sergei Shtylyov; +Cc: yoichi_yuasa, ralf, linux-mips
Hi Sergei,
On Thu, 21 Sep 2006 20:22:02 +0400
Sergei Shtylyov <sshtylyov@dev.rtsoft.ru> wrote:
> Hello.
>
> Yoichi Yuasa wrote:
>
> > Some mtc0_tlbw_hazard() were broken by "[MIPS] Cleanup hazard handling" patch.
> > Please apply this patch.
>
> > tlb-r4k.o disassemble:
>
> > 8009018c <local_flush_tlb_all>:
> > 8009018c: 40066000 mfc0 a2,$12
> > 80090190: 34c1001f ori at,a2,0x1f
> > 80090194: 3821001f xori at,at,0x1f
> > 80090198: 40816000 mtc0 at,$12
> > 8009019c: 00000040 ssnop
> > 800901a0: 00000040 ssnop
> > 800901a4: 00000040 ssnop
>
> Hm, why there are ssnop's here...
ssnop is a part of dvpe().
> > 800901a8: 40075000 mfc0 a3,$10
> > 800901ac: 40801000 mtc0 zero,$2
> > 800901b0: 40801800 mtc0 zero,$3
> > 800901b4: 40043000 mfc0 a0,$6
> > 800901b8: 3c028035 lui v0,0x8035
> > 800901bc: 8c457ac0 lw a1,31424(v0)
> > 800901c0: 0085182a slt v1,a0,a1
> > 800901c4: 1060000b beqz v1,800901f4 <local_flush_tlb_all+0x68>
> > 800901c8: 00044340 sll t0,a0,0xd
> > 800901cc: 3c098000 lui t1,0x8000
> > 800901d0: 01091821 addu v1,t0,t1
> > 800901d4: 40835000 mtc0 v1,$10
> > 800901d8: 10000002 b 800901e4 <local_flush_tlb_all+0x58> <-- mtc0_tlbw_hazard()
> > 800901dc: 40840000 mtc0 a0,$0
> > 800901e0: 42000002 tlbwi
> >
> > Yoichi
> >
> > Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
> >
> > diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/hazards.h mips/include/asm-mips/hazards.h
> > --- mips-orig/include/asm-mips/hazards.h 2006-09-21 18:21:11.793973750 +0900
> > +++ mips/include/asm-mips/hazards.h 2006-09-21 18:55:07.569201750 +0900
> > @@ -138,7 +138,7 @@ ASMMACRO(back_to_back_c0_hazard,
> > * Mostly like R4000 for historic reasons
> > */
> > ASMMACRO(mtc0_tlbw_hazard,
> > - b . + 8
> > + nop; nop; nop; nop; nop; nop
>
> ... and nop's there? This looks inconsistent.
previous mtc0_tlbw_hazard() for C used nop.
"b . + 8" is trick for R4000/R4400, see comment in old hazard.h .
Yoichi
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/3] fixed mtc0_tlbw_hazard
2006-09-21 16:41 ` Yoichi Yuasa
@ 2006-09-21 17:01 ` Sergei Shtylyov
2006-09-22 3:17 ` Yoichi Yuasa
2006-09-25 14:28 ` Ralf Baechle
2006-09-25 14:26 ` Ralf Baechle
1 sibling, 2 replies; 14+ messages in thread
From: Sergei Shtylyov @ 2006-09-21 17:01 UTC (permalink / raw)
To: Yoichi Yuasa; +Cc: ralf, linux-mips
Hello.
Yoichi Yuasa wrote:
>>>Some mtc0_tlbw_hazard() were broken by "[MIPS] Cleanup hazard handling" patch.
>>>Please apply this patch.
>>>tlb-r4k.o disassemble:
>>>8009018c <local_flush_tlb_all>:
>>>8009018c: 40066000 mfc0 a2,$12
>>>80090190: 34c1001f ori at,a2,0x1f
>>>80090194: 3821001f xori at,at,0x1f
>>>80090198: 40816000 mtc0 at,$12
>>>8009019c: 00000040 ssnop
>>>800901a0: 00000040 ssnop
>>>800901a4: 00000040 ssnop
>> Hm, why there are ssnop's here...
> ssnop is a part of dvpe().
Yep, this is irq_disable_hazard, looking sane.
>>>800901a8: 40075000 mfc0 a3,$10
>>>800901ac: 40801000 mtc0 zero,$2
>>>800901b0: 40801800 mtc0 zero,$3
>>>800901b4: 40043000 mfc0 a0,$6
>>>800901b8: 3c028035 lui v0,0x8035
>>>800901bc: 8c457ac0 lw a1,31424(v0)
>>>800901c0: 0085182a slt v1,a0,a1
>>>800901c4: 1060000b beqz v1,800901f4 <local_flush_tlb_all+0x68>
>>>800901c8: 00044340 sll t0,a0,0xd
>>>800901cc: 3c098000 lui t1,0x8000
>>>800901d0: 01091821 addu v1,t0,t1
>>>800901d4: 40835000 mtc0 v1,$10
>>>800901d8: 10000002 b 800901e4 <local_flush_tlb_all+0x58> <-- mtc0_tlbw_hazard()
>>>800901dc: 40840000 mtc0 a0,$0
>>>800901e0: 42000002 tlbwi
>>>Yoichi
>>>Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
>>>
>>>diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/hazards.h mips/include/asm-mips/hazards.h
>>>--- mips-orig/include/asm-mips/hazards.h 2006-09-21 18:21:11.793973750 +0900
>>>+++ mips/include/asm-mips/hazards.h 2006-09-21 18:55:07.569201750 +0900
>>>@@ -138,7 +138,7 @@ ASMMACRO(back_to_back_c0_hazard,
This is under #elif defined(CONFIG_CPU_SB1), right?
>>> * Mostly like R4000 for historic reasons
>>> */
>>> ASMMACRO(mtc0_tlbw_hazard,
>>>- b . + 8
>>>+ nop; nop; nop; nop; nop; nop
>> ... and nop's there? This looks inconsistent.
> previous mtc0_tlbw_hazard() for C used nop.
> "b . + 8" is trick for R4000/R4400, see comment in old hazard.h .
I fail to see what was changed WRT SB1 CPUs by the suspected patch. Though
wait... the previous version was inconsistent, using the different barrier
definitions for C and assembly (nops in the former, and branch in the latter).
But since the assembly version was not really used, it couldn't break
anything... :-/
Anyway, shouldn't ssnop's be used for SB1 instead? CPU has quad-issue
pipeline, hasn't it?
> Yoichi
WBR, Sergei
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH 1/3] fixed mtc0_tlbw_hazard
2006-09-21 17:01 ` Sergei Shtylyov
@ 2006-09-22 3:17 ` Yoichi Yuasa
2006-09-25 14:28 ` Ralf Baechle
1 sibling, 0 replies; 14+ messages in thread
From: Yoichi Yuasa @ 2006-09-22 3:17 UTC (permalink / raw)
To: Sergei Shtylyov; +Cc: yoichi_yuasa, ralf, linux-mips
Hi Sergei,
On Thu, 21 Sep 2006 21:01:14 +0400
Sergei Shtylyov <sshtylyov@ru.mvista.com> wrote:
> Hello.
>
> Yoichi Yuasa wrote:
>
> >>>Some mtc0_tlbw_hazard() were broken by "[MIPS] Cleanup hazard handling" patch.
> >>>Please apply this patch.
>
> >>>tlb-r4k.o disassemble:
>
> >>>8009018c <local_flush_tlb_all>:
> >>>8009018c: 40066000 mfc0 a2,$12
> >>>80090190: 34c1001f ori at,a2,0x1f
> >>>80090194: 3821001f xori at,at,0x1f
> >>>80090198: 40816000 mtc0 at,$12
> >>>8009019c: 00000040 ssnop
> >>>800901a0: 00000040 ssnop
> >>>800901a4: 00000040 ssnop
>
> >> Hm, why there are ssnop's here...
>
> > ssnop is a part of dvpe().
>
> Yep, this is irq_disable_hazard, looking sane.
>
> >>>800901a8: 40075000 mfc0 a3,$10
> >>>800901ac: 40801000 mtc0 zero,$2
> >>>800901b0: 40801800 mtc0 zero,$3
> >>>800901b4: 40043000 mfc0 a0,$6
> >>>800901b8: 3c028035 lui v0,0x8035
> >>>800901bc: 8c457ac0 lw a1,31424(v0)
> >>>800901c0: 0085182a slt v1,a0,a1
> >>>800901c4: 1060000b beqz v1,800901f4 <local_flush_tlb_all+0x68>
> >>>800901c8: 00044340 sll t0,a0,0xd
> >>>800901cc: 3c098000 lui t1,0x8000
> >>>800901d0: 01091821 addu v1,t0,t1
> >>>800901d4: 40835000 mtc0 v1,$10
> >>>800901d8: 10000002 b 800901e4 <local_flush_tlb_all+0x58> <-- mtc0_tlbw_hazard()
> >>>800901dc: 40840000 mtc0 a0,$0
> >>>800901e0: 42000002 tlbwi
>
> >>>Yoichi
>
> >>>Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
> >>>
> >>>diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/hazards.h mips/include/asm-mips/hazards.h
> >>>--- mips-orig/include/asm-mips/hazards.h 2006-09-21 18:21:11.793973750 +0900
> >>>+++ mips/include/asm-mips/hazards.h 2006-09-21 18:55:07.569201750 +0900
> >>>@@ -138,7 +138,7 @@ ASMMACRO(back_to_back_c0_hazard,
>
> This is under #elif defined(CONFIG_CPU_SB1), right?
right.
> >>> * Mostly like R4000 for historic reasons
> >>> */
> >>> ASMMACRO(mtc0_tlbw_hazard,
> >>>- b . + 8
> >>>+ nop; nop; nop; nop; nop; nop
>
> >> ... and nop's there? This looks inconsistent.
>
> > previous mtc0_tlbw_hazard() for C used nop.
> > "b . + 8" is trick for R4000/R4400, see comment in old hazard.h .
>
> I fail to see what was changed WRT SB1 CPUs by the suspected patch. Though
> wait... the previous version was inconsistent, using the different barrier
> definitions for C and assembly (nops in the former, and branch in the latter).
> But since the assembly version was not really used, it couldn't break
> anything... :-/
>
> Anyway, shouldn't ssnop's be used for SB1 instead? CPU has quad-issue
> pipeline, hasn't it?
I don't know SB1 hazard requirement.
This patch has kept previous mtc0_tlbw_hazard().
You can optimize it for SB1.
Yoichi
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/3] fixed mtc0_tlbw_hazard
2006-09-21 17:01 ` Sergei Shtylyov
2006-09-22 3:17 ` Yoichi Yuasa
@ 2006-09-25 14:28 ` Ralf Baechle
1 sibling, 0 replies; 14+ messages in thread
From: Ralf Baechle @ 2006-09-25 14:28 UTC (permalink / raw)
To: Sergei Shtylyov; +Cc: Yoichi Yuasa, linux-mips
On Thu, Sep 21, 2006 at 09:01:14PM +0400, Sergei Shtylyov wrote:
> I fail to see what was changed WRT SB1 CPUs by the suspected patch.
> Though wait... the previous version was inconsistent, using the different
> barrier definitions for C and assembly (nops in the former, and branch in
> the latter). But since the assembly version was not really used, it
> couldn't break anything... :-/
>
> Anyway, shouldn't ssnop's be used for SB1 instead? CPU has quad-issue
> pipeline, hasn't it?
SB1 is almost fully interlocked so the right thing to do is doing nothing.
Ralf
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/3] fixed mtc0_tlbw_hazard
2006-09-21 16:41 ` Yoichi Yuasa
2006-09-21 17:01 ` Sergei Shtylyov
@ 2006-09-25 14:26 ` Ralf Baechle
1 sibling, 0 replies; 14+ messages in thread
From: Ralf Baechle @ 2006-09-25 14:26 UTC (permalink / raw)
To: Yoichi Yuasa; +Cc: Sergei Shtylyov, linux-mips
On Fri, Sep 22, 2006 at 01:41:42AM +0900, Yoichi Yuasa wrote:
> previous mtc0_tlbw_hazard() for C used nop.
> "b . + 8" is trick for R4000/R4400, see comment in old hazard.h .
The trick actually requires to have the tlbw in the branch delay slot,
so was broken for the C version anyway.
Ralf
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/3] fixed mtc0_tlbw_hazard
2006-09-21 16:07 [PATCH 1/3] fixed mtc0_tlbw_hazard Yoichi Yuasa
2006-09-21 16:10 ` [PATCH 2/3] fixed typo in hazard.h Yoichi Yuasa
2006-09-21 16:22 ` [PATCH 1/3] fixed mtc0_tlbw_hazard Sergei Shtylyov
@ 2006-09-22 5:16 ` Atsushi Nemoto
2006-09-22 5:47 ` Yoichi Yuasa
2006-09-25 14:24 ` Ralf Baechle
3 siblings, 1 reply; 14+ messages in thread
From: Atsushi Nemoto @ 2006-09-22 5:16 UTC (permalink / raw)
To: yoichi_yuasa; +Cc: ralf, linux-mips
On Fri, 22 Sep 2006 01:07:13 +0900, Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> wrote:
> Some mtc0_tlbw_hazard() were broken by "[MIPS] Cleanup hazard handling" patch.
...
> Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
>
> diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/hazards.h mips/include/asm-mips/hazards.h
> --- mips-orig/include/asm-mips/hazards.h 2006-09-21 18:21:11.793973750 +0900
> +++ mips/include/asm-mips/hazards.h 2006-09-21 18:55:07.569201750 +0900
> @@ -138,7 +138,7 @@ ASMMACRO(back_to_back_c0_hazard,
> * Mostly like R4000 for historic reasons
> */
> ASMMACRO(mtc0_tlbw_hazard,
> - b . + 8
> + nop; nop; nop; nop; nop; nop
> )
> ASMMACRO(tlbw_use_hazard,
> nop; nop; nop; nop; nop; nop
> @@ -169,7 +169,7 @@ ASMMACRO(back_to_back_c0_hazard,
> * processors.
> */
> ASMMACRO(mtc0_tlbw_hazard,
> - b . + 8
> + nop; nop; nop; nop; nop; nop
> )
> ASMMACRO(tlbw_use_hazard,
> nop; nop; nop; nop; nop; nop
>
The root problem would be new ASMMACRO lacks .set noreorder.
Here is my proposal.
[PATCH] force noreorder in ASMMACRO().
And mtc0_tlbw_hazard and mtc0_tlbw_hazard are adjusted.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h
index dabfc0e..52eb0fc 100644
--- a/include/asm-mips/hazards.h
+++ b/include/asm-mips/hazards.h
@@ -12,11 +12,11 @@ #define _ASM_HAZARDS_H
#ifdef __ASSEMBLER__
-#define ASMMACRO(name, code...) .macro name; code; .endm
+#define ASMMACRO(name, code...) .macro name; .set push; .set noreorder; code; .set pop; .endm
#else
#define ASMMACRO(name, code...) \
-__asm__(".macro " #name "; " #code "; .endm"); \
+__asm__(".macro " #name "; .set push; .set noreorder; " #code "; .set pop; .endm"); \
\
static inline void name(void) \
{ \
@@ -138,7 +138,7 @@ #elif defined(CONFIG_CPU_SB1)
* Mostly like R4000 for historic reasons
*/
ASMMACRO(mtc0_tlbw_hazard,
- b . + 8
+ b . + 8; nop
)
ASMMACRO(tlbw_use_hazard,
nop; nop; nop; nop; nop; nop
@@ -169,7 +169,7 @@ #else
* processors.
*/
ASMMACRO(mtc0_tlbw_hazard,
- b . + 8
+ b . + 8; nop
)
ASMMACRO(tlbw_use_hazard,
nop; nop; nop; nop; nop; nop
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH 1/3] fixed mtc0_tlbw_hazard
2006-09-22 5:16 ` Atsushi Nemoto
@ 2006-09-22 5:47 ` Yoichi Yuasa
0 siblings, 0 replies; 14+ messages in thread
From: Yoichi Yuasa @ 2006-09-22 5:47 UTC (permalink / raw)
To: Atsushi Nemoto; +Cc: yoichi_yuasa, ralf, linux-mips
Hi Nemoto-san,
On Fri, 22 Sep 2006 14:16:34 +0900 (JST)
Atsushi Nemoto <anemo@mba.ocn.ne.jp> wrote:
> On Fri, 22 Sep 2006 01:07:13 +0900, Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> wrote:
> > Some mtc0_tlbw_hazard() were broken by "[MIPS] Cleanup hazard handling" patch.
> ...
> > Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
> >
> > diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/hazards.h mips/include/asm-mips/hazards.h
> > --- mips-orig/include/asm-mips/hazards.h 2006-09-21 18:21:11.793973750 +0900
> > +++ mips/include/asm-mips/hazards.h 2006-09-21 18:55:07.569201750 +0900
> > @@ -138,7 +138,7 @@ ASMMACRO(back_to_back_c0_hazard,
> > * Mostly like R4000 for historic reasons
> > */
> > ASMMACRO(mtc0_tlbw_hazard,
> > - b . + 8
> > + nop; nop; nop; nop; nop; nop
> > )
> > ASMMACRO(tlbw_use_hazard,
> > nop; nop; nop; nop; nop; nop
> > @@ -169,7 +169,7 @@ ASMMACRO(back_to_back_c0_hazard,
> > * processors.
> > */
> > ASMMACRO(mtc0_tlbw_hazard,
> > - b . + 8
> > + nop; nop; nop; nop; nop; nop
> > )
> > ASMMACRO(tlbw_use_hazard,
> > nop; nop; nop; nop; nop; nop
> >
>
> The root problem would be new ASMMACRO lacks .set noreorder.
>
> Here is my proposal.
It's OK for me.
I tested on VR41xx and Cobalt Qube2(Nevada).
Yoichi
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/3] fixed mtc0_tlbw_hazard
2006-09-21 16:07 [PATCH 1/3] fixed mtc0_tlbw_hazard Yoichi Yuasa
` (2 preceding siblings ...)
2006-09-22 5:16 ` Atsushi Nemoto
@ 2006-09-25 14:24 ` Ralf Baechle
3 siblings, 0 replies; 14+ messages in thread
From: Ralf Baechle @ 2006-09-25 14:24 UTC (permalink / raw)
To: Yoichi Yuasa; +Cc: linux-mips
On Fri, Sep 22, 2006 at 01:07:13AM +0900, Yoichi Yuasa wrote:
> diff -pruN -X mips/Documentation/dontdiff mips-orig/include/asm-mips/hazards.h mips/include/asm-mips/hazards.h
> --- mips-orig/include/asm-mips/hazards.h 2006-09-21 18:21:11.793973750 +0900
> +++ mips/include/asm-mips/hazards.h 2006-09-21 18:55:07.569201750 +0900
> @@ -138,7 +138,7 @@ ASMMACRO(back_to_back_c0_hazard,
> * Mostly like R4000 for historic reasons
> */
> ASMMACRO(mtc0_tlbw_hazard,
> - b . + 8
> + nop; nop; nop; nop; nop; nop
> )
This is a patch for the SB1 section of hazards.h; the SB1 does not have
have this hazard so if anything this hazard should be deleted entirely as
in this patch.
diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h
index dabfc0e..9bb7b4c 100644
--- a/include/asm-mips/hazards.h
+++ b/include/asm-mips/hazards.h
@@ -138,13 +138,10 @@ #elif defined(CONFIG_CPU_SB1)
* Mostly like R4000 for historic reasons
*/
ASMMACRO(mtc0_tlbw_hazard,
- b . + 8
)
ASMMACRO(tlbw_use_hazard,
- nop; nop; nop; nop; nop; nop
)
ASMMACRO(tlb_probe_hazard,
- nop; nop; nop; nop; nop; nop
)
ASMMACRO(tlbw_eret_hazard,
)
> @@ -169,7 +169,7 @@ ASMMACRO(back_to_back_c0_hazard,
> * processors.
> */
> ASMMACRO(mtc0_tlbw_hazard,
> - b . + 8
> + nop; nop; nop; nop; nop; nop
6 nops is quite some overkill - or does Vr41xx need those? On R4000/R4600
the mtc0..tlbw hazard is one cycle. So this one should be a single nop
at most for these cpus.
The macroized hazard barriers aren't used anymore the way they used to;
this is the way the branch trick was meant to be used:
mtc0 k1, CP0_ENTRYLO1
b 1f
tlbwr
1: nop
eret
This works because the R4000 kills the two instructions following the
branch delay slot so needs three cycles between the tlbwr and eret. At
the same time it has a three cycle hazard to cover. On the R4600 otoh
the branch latency and the hazard is shorter by two cycles so the branch
trick gives optimal performance for both processors. But that kind of
optimization only really matters to TLB refill handlers and we now got a
different strategy for those anyway.
Talking about nops, R4000 TLBP writes c0_index on stage 7, mfc0 reads
c0_index on stage 4 so tlb_probe_hazard needs 3 nop so the resulting
patch for the catch all case would be:
diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h
index 7015764..0c39583 100644
--- a/include/asm-mips/hazards.h
+++ b/include/asm-mips/hazards.h
@@ -157,18 +157,18 @@ #else
* processors.
*/
ASMMACRO(mtc0_tlbw_hazard,
- b . + 8
+ nop
)
ASMMACRO(tlbw_use_hazard,
- nop; nop; nop; nop; nop; nop
+ nop; nop; nop
)
ASMMACRO(tlb_probe_hazard,
- nop; nop; nop; nop; nop; nop
+ nop; nop; nop
)
ASMMACRO(irq_enable_hazard,
)
ASMMACRO(irq_disable_hazard,
- _ssnop; _ssnop; _ssnop
+ nop; nop; nop
)
ASMMACRO(back_to_back_c0_hazard,
_ssnop; _ssnop; _ssnop;
Ralf
^ permalink raw reply related [flat|nested] 14+ messages in thread