* [PATCH] tx49xx: add some mach specific headers
@ 2007-07-24 16:50 Atsushi Nemoto
2007-07-24 17:00 ` Sergei Shtylyov
2007-07-25 14:12 ` Ralf Baechle
0 siblings, 2 replies; 7+ messages in thread
From: Atsushi Nemoto @ 2007-07-24 16:50 UTC (permalink / raw)
To: linux-mips; +Cc: ralf
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
---
.../asm-mips/mach-tx49xx/cpu-feature-overrides.h | 23 ++++++++++++++++++++
include/asm-mips/mach-tx49xx/kmalloc.h | 8 +++++++
2 files changed, 31 insertions(+), 0 deletions(-)
diff --git a/include/asm-mips/mach-tx49xx/cpu-feature-overrides.h b/include/asm-mips/mach-tx49xx/cpu-feature-overrides.h
new file mode 100644
index 0000000..275eaf9
--- /dev/null
+++ b/include/asm-mips/mach-tx49xx/cpu-feature-overrides.h
@@ -0,0 +1,23 @@
+#ifndef __ASM_MACH_TX49XX_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_TX49XX_CPU_FEATURE_OVERRIDES_H
+
+#define cpu_has_llsc 1
+#define cpu_has_64bits 1
+#define cpu_has_inclusive_pcaches 0
+
+#define cpu_has_mips16 0
+#define cpu_has_mdmx 0
+#define cpu_has_mips3d 0
+#define cpu_has_smartmips 0
+#define cpu_has_vtag_icache 0
+#define cpu_has_ic_fills_f_dc 0
+#define cpu_has_dsp 0
+#define cpu_has_mipsmt 0
+#define cpu_has_userlocal 0
+
+#define cpu_has_mips32r1 0
+#define cpu_has_mips32r2 0
+#define cpu_has_mips64r1 0
+#define cpu_has_mips64r2 0
+
+#endif /* __ASM_MACH_TX49XX_CPU_FEATURE_OVERRIDES_H */
diff --git a/include/asm-mips/mach-tx49xx/kmalloc.h b/include/asm-mips/mach-tx49xx/kmalloc.h
new file mode 100644
index 0000000..913ff19
--- /dev/null
+++ b/include/asm-mips/mach-tx49xx/kmalloc.h
@@ -0,0 +1,8 @@
+#ifndef __ASM_MACH_TX49XX_KMALLOC_H
+#define __ASM_MACH_TX49XX_KMALLOC_H
+
+/*
+ * All happy, no need to define ARCH_KMALLOC_MINALIGN
+ */
+
+#endif /* __ASM_MACH_TX49XX_KMALLOC_H */
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH] tx49xx: add some mach specific headers
2007-07-24 16:50 [PATCH] tx49xx: add some mach specific headers Atsushi Nemoto
@ 2007-07-24 17:00 ` Sergei Shtylyov
2007-07-24 21:20 ` Thiemo Seufer
2007-07-25 14:12 ` Ralf Baechle
1 sibling, 1 reply; 7+ messages in thread
From: Sergei Shtylyov @ 2007-07-24 17:00 UTC (permalink / raw)
To: Atsushi Nemoto; +Cc: linux-mips, ralf
Hello.
Atsushi Nemoto wrote:
> diff --git a/include/asm-mips/mach-tx49xx/cpu-feature-overrides.h b/include/asm-mips/mach-tx49xx/cpu-feature-overrides.h
> new file mode 100644
> index 0000000..275eaf9
> --- /dev/null
> +++ b/include/asm-mips/mach-tx49xx/cpu-feature-overrides.h
> @@ -0,0 +1,23 @@
[...]
> +#define cpu_has_mips32r1 0
> +#define cpu_has_mips32r2 0
> +#define cpu_has_mips64r1 0
> +#define cpu_has_mips64r2 0
Hm, really?
> +
> +#endif /* __ASM_MACH_TX49XX_CPU_FEATURE_OVERRIDES_H */
MBR, Sergei
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH] tx49xx: add some mach specific headers
2007-07-24 17:00 ` Sergei Shtylyov
@ 2007-07-24 21:20 ` Thiemo Seufer
2007-07-25 3:32 ` Atsushi Nemoto
0 siblings, 1 reply; 7+ messages in thread
From: Thiemo Seufer @ 2007-07-24 21:20 UTC (permalink / raw)
To: Sergei Shtylyov; +Cc: Atsushi Nemoto, linux-mips, ralf
Sergei Shtylyov wrote:
> Hello.
>
> Atsushi Nemoto wrote:
>
>> diff --git a/include/asm-mips/mach-tx49xx/cpu-feature-overrides.h
>> b/include/asm-mips/mach-tx49xx/cpu-feature-overrides.h
>> new file mode 100644
>> index 0000000..275eaf9
>> --- /dev/null
>> +++ b/include/asm-mips/mach-tx49xx/cpu-feature-overrides.h
>> @@ -0,0 +1,23 @@
> [...]
>> +#define cpu_has_mips32r1 0
>> +#define cpu_has_mips32r2 0
>> +#define cpu_has_mips64r1 0
>> +#define cpu_has_mips64r2 0
>
> Hm, really?
IIRC it is MIPS IV. (tx99 is MIPS64R1).
Thiemo
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] tx49xx: add some mach specific headers
2007-07-24 21:20 ` Thiemo Seufer
@ 2007-07-25 3:32 ` Atsushi Nemoto
2007-07-25 14:03 ` Sergei Shtylyov
0 siblings, 1 reply; 7+ messages in thread
From: Atsushi Nemoto @ 2007-07-25 3:32 UTC (permalink / raw)
To: ths; +Cc: sshtylyov, linux-mips, ralf
On Tue, 24 Jul 2007 22:20:34 +0100, Thiemo Seufer <ths@networkno.de> wrote:
> >> +#define cpu_has_mips32r1 0
> >> +#define cpu_has_mips32r2 0
> >> +#define cpu_has_mips64r1 0
> >> +#define cpu_has_mips64r2 0
> >
> > Hm, really?
>
> IIRC it is MIPS IV. (tx99 is MIPS64R1).
It is MIPS III.
---
Atsushi Nemoto
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] tx49xx: add some mach specific headers
2007-07-25 3:32 ` Atsushi Nemoto
@ 2007-07-25 14:03 ` Sergei Shtylyov
2007-07-25 14:26 ` Atsushi Nemoto
0 siblings, 1 reply; 7+ messages in thread
From: Sergei Shtylyov @ 2007-07-25 14:03 UTC (permalink / raw)
To: Atsushi Nemoto; +Cc: ths, linux-mips, ralf
Hello.
Atsushi Nemoto wrote:
>>>>+#define cpu_has_mips32r1 0
>>>>+#define cpu_has_mips32r2 0
>>>>+#define cpu_has_mips64r1 0
>>>>+#define cpu_has_mips64r2 0
>>> Hm, really?
I'm not good at arch generations, so forgive me a silly complaint. ;-)
>>IIRC it is MIPS IV. (tx99 is MIPS64R1).
> It is MIPS III.
"Upward compatible" with it as the manual says.
> ---
> Atsushi Nemoto
WBR, Sergei
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] tx49xx: add some mach specific headers
2007-07-24 16:50 [PATCH] tx49xx: add some mach specific headers Atsushi Nemoto
2007-07-24 17:00 ` Sergei Shtylyov
@ 2007-07-25 14:12 ` Ralf Baechle
1 sibling, 0 replies; 7+ messages in thread
From: Ralf Baechle @ 2007-07-25 14:12 UTC (permalink / raw)
To: Atsushi Nemoto; +Cc: linux-mips
On Wed, Jul 25, 2007 at 01:50:08AM +0900, Atsushi Nemoto wrote:
Applied. Thanks,
Ralf
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2007-07-25 14:25 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2007-07-24 16:50 [PATCH] tx49xx: add some mach specific headers Atsushi Nemoto
2007-07-24 17:00 ` Sergei Shtylyov
2007-07-24 21:20 ` Thiemo Seufer
2007-07-25 3:32 ` Atsushi Nemoto
2007-07-25 14:03 ` Sergei Shtylyov
2007-07-25 14:26 ` Atsushi Nemoto
2007-07-25 14:12 ` Ralf Baechle
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox