From: James Hogan <james.hogan@imgtec.com>
To: David Daney <ddaney.cavm@gmail.com>, <Zubair.Kakakhel@imgtec.com>,
<peterz@infradead.org>, <paul.gortmaker@windriver.com>,
<davidlohr@hp.com>, <macro@linux-mips.org>, <chenhc@lemote.com>,
<zajec5@gmail.com>, <keescook@chromium.org>,
<alex@alex-smith.me.uk>, <tglx@linutronix.de>,
<blogic@openwrt.org>, <jchandra@broadcom.com>,
<paul.burton@imgtec.com>, <qais.yousef@imgtec.com>,
<ralf@linux-mips.org>, <markos.chandras@imgtec.com>,
<manuel.lauss@gmail.com>, <akpm@linux-foundation.org>,
<lars.persson@axis.com>, <torvalds@linux-foundation.org>
Cc: <linux-kernel@vger.kernel.org>, <linux-mips@linux-mips.org>,
<libc-alpha@sourceware.org>, David Daney <david.daney@cavium.com>
Subject: Re: [PATCH] MIPS: Allow FPU emulator to use non-stack area.
Date: Tue, 7 Oct 2014 09:43:39 +0100 [thread overview]
Message-ID: <5433A7BB.1090207@imgtec.com> (raw)
In-Reply-To: <1412626317-4128-1-git-send-email-ddaney.cavm@gmail.com>
Hi David,
On 06/10/14 21:11, David Daney wrote:
> Any userspace thread desiring a non-executable stack,
> must allocate a 4-byte aligned area at least 8 bytes long
<snip>
> +SYSCALL_DEFINE1(set_fpuemul_xol_area, unsigned long, addr)
> +{
> + struct thread_info *ti = task_thread_info(current);
> +
> + ti->fpu_emul_xol = addr;
> + return 0;
> +}
> +
<snip>
> - /* Ensure that the two instructions are in the same cache line */
> - fr = (struct emuframe __user *)
> - ((regs->regs[29] - sizeof(struct emuframe)) & ~0x7);
> + if (ti->fpu_emul_xol != ~0ul)
> + fr = (struct emuframe *)ti->fpu_emul_xol;
> + else
> + /* Ensure that the two instructions are in the same cache line */
> + fr = (struct emuframe __user *)
> + ((regs->regs[29] - sizeof(struct emuframe)) & ~0x7);
I know your patch was more an RFC, but on a technical note, this
comment/code seems to imply that the address should be 8 byte aligned
(rather than 4 byte) so they both land in the same cache line. Also, I
think the alignment should be validated in the syscall.
Cheers
James
WARNING: multiple messages have this Message-ID (diff)
From: James Hogan <james.hogan@imgtec.com>
To: David Daney <ddaney.cavm@gmail.com>,
Zubair.Kakakhel@imgtec.com, peterz@infradead.org,
paul.gortmaker@windriver.com, davidlohr@hp.com,
macro@linux-mips.org, chenhc@lemote.com, zajec5@gmail.com,
keescook@chromium.org, alex@alex-smith.me.uk, tglx@linutronix.de,
blogic@openwrt.org, jchandra@broadcom.com,
paul.burton@imgtec.com, qais.yousef@imgtec.com,
ralf@linux-mips.org, markos.chandras@imgtec.com,
manuel.lauss@gmail.com, akpm@linux-foundation.org,
lars.persson@axis.com, torvalds@linux-foundation.org
Cc: linux-kernel@vger.kernel.org, linux-mips@linux-mips.org,
libc-alpha@sourceware.org, David Daney <david.daney@cavium.com>
Subject: Re: [PATCH] MIPS: Allow FPU emulator to use non-stack area.
Date: Tue, 7 Oct 2014 09:43:39 +0100 [thread overview]
Message-ID: <5433A7BB.1090207@imgtec.com> (raw)
Message-ID: <20141007084339.7jU8vt-THhWNT8D9FiyA0kDvMoaVI3IQom9athQABXk@z> (raw)
In-Reply-To: <1412626317-4128-1-git-send-email-ddaney.cavm@gmail.com>
Hi David,
On 06/10/14 21:11, David Daney wrote:
> Any userspace thread desiring a non-executable stack,
> must allocate a 4-byte aligned area at least 8 bytes long
<snip>
> +SYSCALL_DEFINE1(set_fpuemul_xol_area, unsigned long, addr)
> +{
> + struct thread_info *ti = task_thread_info(current);
> +
> + ti->fpu_emul_xol = addr;
> + return 0;
> +}
> +
<snip>
> - /* Ensure that the two instructions are in the same cache line */
> - fr = (struct emuframe __user *)
> - ((regs->regs[29] - sizeof(struct emuframe)) & ~0x7);
> + if (ti->fpu_emul_xol != ~0ul)
> + fr = (struct emuframe *)ti->fpu_emul_xol;
> + else
> + /* Ensure that the two instructions are in the same cache line */
> + fr = (struct emuframe __user *)
> + ((regs->regs[29] - sizeof(struct emuframe)) & ~0x7);
I know your patch was more an RFC, but on a technical note, this
comment/code seems to imply that the address should be 8 byte aligned
(rather than 4 byte) so they both land in the same cache line. Also, I
think the alignment should be validated in the syscall.
Cheers
James
next prev parent reply other threads:[~2014-10-07 8:43 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-06 20:11 [PATCH] MIPS: Allow FPU emulator to use non-stack area David Daney
2014-10-07 8:43 ` James Hogan [this message]
2014-10-07 8:43 ` James Hogan
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