From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>,
aleksey.makarov@auriga.com, james.hogan@imgtec.com,
paul.burton@imgtec.com, david.daney@cavium.com,
peterz@infradead.org, linux-mips@linux-mips.org,
linux-kernel@vger.kernel.org, ralf@linux-mips.org,
davidlohr@hp.com, kirill@shutemov.name,
akpm@linux-foundation.org, mingo@kernel.org
Subject: Re: [PATCH v2] MIPS64: Support of at least 48 bits of SEGBITS
Date: Fri, 15 May 2015 13:39:10 +0300 [thread overview]
Message-ID: <5555CCCE.6010006@cogentembedded.com> (raw)
In-Reply-To: <20150515013351.7450.12130.stgit@ubuntu-yegoshin>
Hello.
On 5/15/2015 4:34 AM, Leonid Yegoshin wrote:
> SEGBITS default is 40 bits or less, depending from CPU type.
> This patch introduces 48bits of application virtual address (SEGBITS) support.
> It is defined only for 16K and 64K pages and is optional (configurable).
> Penalty - a small number of additional pages for generic (small) applications.
> But for 64K pages it adds 3rd level of PTE structure, which has a little
> impact during software TLB refill.
> This patch is needed because MIPS I6XXX and P6XXX cores have 48 bit of
> virtual address in each segment (SEGBITS).
> Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
> ---
> V2: Added correction for defintion of TASK_SIZE64
> ---
> arch/mips/Kconfig | 11 +++++++++++
> arch/mips/include/asm/pgtable-64.h | 18 +++++++++++-------
> arch/mips/include/asm/processor.h | 6 +++++-
> 3 files changed, 27 insertions(+), 8 deletions(-)
> diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
> index 76efb02ae99f..3acff2f065e9 100644
> --- a/arch/mips/Kconfig
> +++ b/arch/mips/Kconfig
> @@ -2032,6 +2032,17 @@ config PAGE_SIZE_64KB
>
> endchoice
>
> +config 48VMBITS
> + bool "48 bits virtual memory"
> + depends on PAGE_SIZE_16KB || PAGE_SIZE_64KB
> + depends on 64BIT
> + help
> + Define a maximum at least 48 bits of application virtual memory.
> + Default is 40 bits or less, depending from CPU.
s/from/on/.
> + In generic (small) application it is a small set of pages increase
> + in page tables.
Can't parse that...
[...]
> diff --git a/arch/mips/include/asm/pgtable-64.h b/arch/mips/include/asm/pgtable-64.h
> index cf661a2fb141..c6b5473440e6 100644
> --- a/arch/mips/include/asm/pgtable-64.h
> +++ b/arch/mips/include/asm/pgtable-64.h
[...]
> @@ -114,11 +122,7 @@
> #endif
> #define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t))
>
> -#if PGDIR_SIZE >= TASK_SIZE64
> -#define USER_PTRS_PER_PGD (1)
> -#else
> -#define USER_PTRS_PER_PGD (TASK_SIZE64 / PGDIR_SIZE)
> -#endif
> +#define USER_PTRS_PER_PGD ((TASK_SIZE64 / PGDIR_SIZE)?(TASK_SIZE64 / PGDIR_SIZE):1)
Could write this as '(TASK_SIZE64 / PGDIR_SIZE ?: 1)'.
[...]
> diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h
> index 9b3b48e21c22..bd2030f32ea4 100644
> --- a/arch/mips/include/asm/processor.h
> +++ b/arch/mips/include/asm/processor.h
> @@ -69,7 +69,11 @@ extern unsigned int vced_count, vcei_count;
> * 8192EB ...
> */
> #define TASK_SIZE32 0x7fff8000UL
> -#define TASK_SIZE64 0x10000000000UL
> +#ifdef CONFIG_48VMBITS
> +#define TASK_SIZE64 (0x1UL << ((cpu_data[0].vmbits>48)?48:cpu_data[0].vmbits))
Perhaps '(0x1UL << (min(cpu_data[0].vmbits, 48))'?
> +#else
> +#define TASK_SIZE64 (0x10000000000UL)
Parens not needed.
[...]
WBR, Sergei
next prev parent reply other threads:[~2015-05-15 10:39 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-15 1:34 [PATCH v2] MIPS64: Support of at least 48 bits of SEGBITS Leonid Yegoshin
2015-05-15 1:34 ` Leonid Yegoshin
2015-05-15 10:39 ` Sergei Shtylyov [this message]
2015-05-15 16:28 ` David Daney
2015-05-15 19:03 ` Leonid Yegoshin
2015-05-16 2:11 ` Maciej W. Rozycki
2015-05-15 20:49 ` David Daney
2015-05-15 21:01 ` Leonid Yegoshin
2015-05-15 21:01 ` Leonid Yegoshin
2015-05-15 21:53 ` Ralf Baechle
2015-05-15 22:39 ` Leonid Yegoshin
2015-05-15 22:39 ` Leonid Yegoshin
2015-05-16 2:42 ` Joshua Kinard
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