Linux MIPS Architecture development
 help / color / mirror / Atom feed
From: Markos Chandras <Markos.Chandras@imgtec.com>
To: <linux-mips@linux-mips.org>
Cc: "Steven J. Hill" <Steven.Hill@imgtec.com>,
	Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [PATCH] MIPS: asm: pgtable-bits: Add R6 support for PTE RI/XI bits
Date: Thu, 4 Jun 2015 12:17:45 +0100	[thread overview]
Message-ID: <557033D9.6000006@imgtec.com> (raw)
In-Reply-To: <1432907032-16689-1-git-send-email-markos.chandras@imgtec.com>

On 05/29/2015 02:43 PM, Markos Chandras wrote:
> Commit be0c37c985ed ("MIPS: Rearrange PTE bits into fixed positions.")
> rearranged the PTE bits into fixed positions in preparation for the XPA
> support. However, this patch broke R6 since it only took R2 cores
> into consideration for the RI/XI bits leading to boot failures. We fix
> this by adding the missing CONFIG_CPU_MIPSR6 definitions
> 
> Fixes: be0c37c985ed ("MIPS: Rearrange PTE bits into fixed positions.")
> Cc: Steven J. Hill <Steven.Hill@imgtec.com>
> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
> ---
> This is a bugfix for a bug introduced in 4.1-rc1. Can we please have
> this patch in 4.1?
> ---

Ralf,

I see you merged this patch (thanks!) but it's in the wrong branch it
seems. It's not in the 4.1-fixes I think. Can you please schedule this
patch for 4.1 since it's a bugfix? Otherwise R6 won't even boot in 4.1.

Thank you

-- 
markos

WARNING: multiple messages have this Message-ID (diff)
From: Markos Chandras <Markos.Chandras@imgtec.com>
To: linux-mips@linux-mips.org
Cc: "Steven J. Hill" <Steven.Hill@imgtec.com>,
	Ralf Baechle <ralf@linux-mips.org>
Subject: Re: [PATCH] MIPS: asm: pgtable-bits: Add R6 support for PTE RI/XI bits
Date: Thu, 4 Jun 2015 12:17:45 +0100	[thread overview]
Message-ID: <557033D9.6000006@imgtec.com> (raw)
Message-ID: <20150604111745.AXPbv5UzLIqFLcg8sLmyczV_5GLCzKcD4EBnid1a3YA@z> (raw)
In-Reply-To: <1432907032-16689-1-git-send-email-markos.chandras@imgtec.com>

On 05/29/2015 02:43 PM, Markos Chandras wrote:
> Commit be0c37c985ed ("MIPS: Rearrange PTE bits into fixed positions.")
> rearranged the PTE bits into fixed positions in preparation for the XPA
> support. However, this patch broke R6 since it only took R2 cores
> into consideration for the RI/XI bits leading to boot failures. We fix
> this by adding the missing CONFIG_CPU_MIPSR6 definitions
> 
> Fixes: be0c37c985ed ("MIPS: Rearrange PTE bits into fixed positions.")
> Cc: Steven J. Hill <Steven.Hill@imgtec.com>
> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
> ---
> This is a bugfix for a bug introduced in 4.1-rc1. Can we please have
> this patch in 4.1?
> ---

Ralf,

I see you merged this patch (thanks!) but it's in the wrong branch it
seems. It's not in the 4.1-fixes I think. Can you please schedule this
patch for 4.1 since it's a bugfix? Otherwise R6 won't even boot in 4.1.

Thank you

-- 
markos

  parent reply	other threads:[~2015-06-04 11:17 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-29 13:43 [PATCH] MIPS: asm: pgtable-bits: Add R6 support for PTE RI/XI bits Markos Chandras
2015-05-29 13:43 ` Markos Chandras
2015-06-04 11:17 ` Markos Chandras [this message]
2015-06-04 11:17   ` Markos Chandras

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=557033D9.6000006@imgtec.com \
    --to=markos.chandras@imgtec.com \
    --cc=Steven.Hill@imgtec.com \
    --cc=linux-mips@linux-mips.org \
    --cc=ralf@linux-mips.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox