Re: [PATCH 05/19] MIPS: asm: mips-cm: Implement mips_cm_revision

[James Hogan <james.hogan@imgtec.com>]

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Hi Markos,

On 09/07/15 10:40, Markos Chandras wrote:
> From: Paul Burton <paul.burton@imgtec.com>
> 
> Provide a function to trivially return the version of the CM present in
> the system, or 0 if no CM is present. The mips_cm_revision() will be
> used later on to determine the CM register width, so it must not use
> the regular CM accessors to read the revision register since that will
> lead to build failures due to recursive inlines.
> 
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>
> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
> ---
>  arch/mips/include/asm/mips-cm.h | 29 +++++++++++++++++++++++++++++
>  1 file changed, 29 insertions(+)
> 
> diff --git a/arch/mips/include/asm/mips-cm.h b/arch/mips/include/asm/mips-cm.h
> index edc7ee95269e..29ff74a629f6 100644
> --- a/arch/mips/include/asm/mips-cm.h
> +++ b/arch/mips/include/asm/mips-cm.h
> @@ -189,6 +189,13 @@ BUILD_CM_Cx_R_(tcid_8_priority,	0x80)
>  #define CM_GCR_REV_MINOR_SHF			0
>  #define CM_GCR_REV_MINOR_MSK			(_ULCAST_(0xff) << 0)
>  
> +#define CM_ENCODE_REV(major, minor) \
> +		((major << CM_GCR_REV_MAJOR_SHF) | \
> +		 ((minor) << CM_GCR_REV_MINOR_SHF))
> +
> +#define CM_REV_CM2				CM_ENCODE_REV(6, 0)
> +#define CM_REV_CM3				CM_ENCODE_REV(8, 0)
> +
>  /* GCR_ERROR_CAUSE register fields */
>  #define CM_GCR_ERROR_CAUSE_ERRTYPE_SHF		27
>  #define CM_GCR_ERROR_CAUSE_ERRTYPE_MSK		(_ULCAST_(0x1f) << 27)
> @@ -324,4 +331,26 @@ static inline int mips_cm_l2sync(void)
>  	return 0;
>  }
>  
> +/**
> + * mips_cm_revision - return CM revision

don't forget brackets: "mips_cm_revision()"

> + *
> + * Returns the revision of the CM, from GCR_REV, or 0 if no CM is present.
> + * The return value should be checked against the CM_REV_* macros.

Use "Return: bla bla bla." so it lands in a nice return section.

see Documentation/kernel-doc-nano-HOWTO.txt for an example.

Cheers
James

> + */
> +static inline int mips_cm_revision(void)
> +{
> +	static int mips_cm_revision_nr = -1;
> +
> +	/* No need to read that register over and over */
> +	if (mips_cm_revision_nr >= 0)
> +		return mips_cm_revision_nr;
> +
> +	if (!mips_cm_present())
> +		return 0;
> +
> +	mips_cm_revision_nr = read_gcr_rev();
> +
> +	return mips_cm_revision_nr;
> +}
> +
>  #endif /* __MIPS_ASM_MIPS_CM_H__ */
> 


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