Linux MIPS Architecture development
 help / color / mirror / Atom feed
From: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
To: James Hogan <james.hogan@imgtec.com>
Cc: <yhb@ruijie.com.cn>, <ralf@linux-mips.org>, <linux-mips@linux-mips.org>
Subject: [PATCH] MIPS: We need to clear MMU contexts of all other processes when asid_cache(cpu) wraps to 0.
Date: Mon, 11 Jul 2016 11:19:30 -0700	[thread overview]
Message-ID: <5783E332.2020503@imgtec.com> (raw)
In-Reply-To: <20160711180755.GA29839@jhogan-linux.le.imgtec.org>

On 07/11/2016 11:07 AM, James Hogan wrote:
> Hi Leonid,
>
> On Mon, Jul 11, 2016 at 11:02:00AM -0700, Leonid Yegoshin wrote:
>> On 07/10/2016 06:04 AM, yhb@ruijie.com.cn wrote:
>>> Subject: [PATCH] MIPS: We need to clear MMU contexts of all other processes
>>>    when asid_cache(cpu) wraps to 0.
>>>
>>> Suppose that asid_cache(cpu) wraps to 0 every n days.
>>> case 1:
>>> (1)Process 1 got ASID 0x101.
>>> (2)Process 1 slept for n days.
>>> (3)asid_cache(cpu) wrapped to 0x101, and process 2 got ASID 0x101.
>>> (4)Process 1 is woken,and ASID of process 1 is same as ASID of process 2.
>>>
>>> case 2:
>>> (1)Process 1 got ASID 0x101 on CPU 1.
>>> (2)Process 1 migrated to CPU 2.
>>> (3)Process 1 migrated to CPU 1 after n days.
>>> (4)asid_cache on CPU 1 wrapped to 0x101, and process 2 got ASID 0x101.
>>> (5)Process 1 is scheduled, and ASID of process 1 is same as ASID of process 2.
>>>
>>> So we need to clear MMU contexts of all other processes when asid_cache(cpu) wraps to 0.
>>>
>>> Signed-off-by: yhb <yhb@ruijie.com.cn>
>>>
>> I think a more clear description should be given here - there is no
>> indication that wrap happens over 32bit integer.
>>
>> And taking into account "n days" frequency - can we just kill all local
>> ASIDs in all processes (additionally to local_flush_tlb_all) and enforce
>> reassignment if wrap happens? It should be a very rare event, you are
>> first to hit this.
>>
>> It seems to be some localized stuff in get_new_mmu_context() instead of
>> widespread patching.
> That is what this patch does, but to do so it appears you need to lock
> the other tasks one by one, and that must be doable from a context
> switch, i.e. hardirq context, and that requires the task lock to be of
> the _irqsave variant, hence the widespread changes and the relatively
> tiny MIPS change hidden in the middle.
>
Not exactly. The change must be done only for local CPU which executes 
at the moment get_new_mmu_context(). Just prevent preemption here and 
change of cpu_context(THIS_CPU,...) can be done safely - other CPUs 
don't do anything with this variable besides killing it (writing 0 to it).

You can look into flush_tlb_mm() for example how it is cleared for 
single memory map.

We have a macro to safely walk all processes, right? (don't remember 
it's name).

WARNING: multiple messages have this Message-ID (diff)
From: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
To: James Hogan <james.hogan@imgtec.com>
Cc: yhb@ruijie.com.cn, ralf@linux-mips.org, linux-mips@linux-mips.org
Subject: [PATCH] MIPS: We need to clear MMU contexts of all other processes when asid_cache(cpu) wraps to 0.
Date: Mon, 11 Jul 2016 11:19:30 -0700	[thread overview]
Message-ID: <5783E332.2020503@imgtec.com> (raw)
Message-ID: <20160711181930.CJcO6HZcAgXkA7hrY8vh4xCK0HqbzTfyeyc_qQZSkhw@z> (raw)
In-Reply-To: <20160711180755.GA29839@jhogan-linux.le.imgtec.org>

On 07/11/2016 11:07 AM, James Hogan wrote:
> Hi Leonid,
>
> On Mon, Jul 11, 2016 at 11:02:00AM -0700, Leonid Yegoshin wrote:
>> On 07/10/2016 06:04 AM, yhb@ruijie.com.cn wrote:
>>> Subject: [PATCH] MIPS: We need to clear MMU contexts of all other processes
>>>    when asid_cache(cpu) wraps to 0.
>>>
>>> Suppose that asid_cache(cpu) wraps to 0 every n days.
>>> case 1:
>>> (1)Process 1 got ASID 0x101.
>>> (2)Process 1 slept for n days.
>>> (3)asid_cache(cpu) wrapped to 0x101, and process 2 got ASID 0x101.
>>> (4)Process 1 is woken,and ASID of process 1 is same as ASID of process 2.
>>>
>>> case 2:
>>> (1)Process 1 got ASID 0x101 on CPU 1.
>>> (2)Process 1 migrated to CPU 2.
>>> (3)Process 1 migrated to CPU 1 after n days.
>>> (4)asid_cache on CPU 1 wrapped to 0x101, and process 2 got ASID 0x101.
>>> (5)Process 1 is scheduled, and ASID of process 1 is same as ASID of process 2.
>>>
>>> So we need to clear MMU contexts of all other processes when asid_cache(cpu) wraps to 0.
>>>
>>> Signed-off-by: yhb <yhb@ruijie.com.cn>
>>>
>> I think a more clear description should be given here - there is no
>> indication that wrap happens over 32bit integer.
>>
>> And taking into account "n days" frequency - can we just kill all local
>> ASIDs in all processes (additionally to local_flush_tlb_all) and enforce
>> reassignment if wrap happens? It should be a very rare event, you are
>> first to hit this.
>>
>> It seems to be some localized stuff in get_new_mmu_context() instead of
>> widespread patching.
> That is what this patch does, but to do so it appears you need to lock
> the other tasks one by one, and that must be doable from a context
> switch, i.e. hardirq context, and that requires the task lock to be of
> the _irqsave variant, hence the widespread changes and the relatively
> tiny MIPS change hidden in the middle.
>
Not exactly. The change must be done only for local CPU which executes 
at the moment get_new_mmu_context(). Just prevent preemption here and 
change of cpu_context(THIS_CPU,...) can be done safely - other CPUs 
don't do anything with this variable besides killing it (writing 0 to it).

You can look into flush_tlb_mm() for example how it is cleared for 
single memory map.

We have a macro to safely walk all processes, right? (don't remember 
it's name).

  parent reply	other threads:[~2016-07-11 18:19 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-07-10 13:04 MIPS: We need to clear MMU contexts of all other processes when asid_cache(cpu) wraps to 0 yhb
2016-07-10 13:04 ` yhb
2016-07-11  9:30 ` James Hogan
2016-07-11  9:30   ` James Hogan
2016-07-11 18:02 ` Leonid Yegoshin
2016-07-11 18:02   ` Leonid Yegoshin
2016-07-11 18:05   ` [PATCH] " Leonid Yegoshin
2016-07-11 18:05     ` Leonid Yegoshin
2016-07-11 18:07   ` James Hogan
2016-07-11 18:07     ` James Hogan
2016-07-11 18:19     ` Leonid Yegoshin [this message]
2016-07-11 18:19       ` [PATCH] " Leonid Yegoshin
2016-07-11 19:21       ` James Hogan
2016-07-11 19:21         ` James Hogan
2016-07-11 19:39         ` Leonid Yegoshin
2016-07-11 19:39           ` Leonid Yegoshin
2016-07-11 20:18           ` James Hogan
2016-07-11 20:18             ` James Hogan
  -- strict thread matches above, loose matches on Subject: below --
2016-07-12  3:48 yhb
2016-07-12  3:48 ` yhb

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=5783E332.2020503@imgtec.com \
    --to=leonid.yegoshin@imgtec.com \
    --cc=james.hogan@imgtec.com \
    --cc=linux-mips@linux-mips.org \
    --cc=ralf@linux-mips.org \
    --cc=yhb@ruijie.com.cn \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox