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From: Ben Hutchings <ben@decadent.org.uk>
To: linux-kernel@vger.kernel.org, stable@vger.kernel.org
Cc: akpm@linux-foundation.org, "Paul Burton" <paul.burton@mips.com>,
	"Rui Wang" <rui.wang@windriver.com>,
	"Ralf Baechle" <ralf@linux-mips.org>,
	"James Hogan" <jhogan@kernel.org>,
	"Wolfgang Grandegger" <wg@grandegger.com>,
	linux-mips@linux-mips.org
Subject: [PATCH 3.16 261/366] MIPS: Fix off-by-one in pci_resource_to_user()
Date: Sun, 11 Nov 2018 19:49:05 +0000	[thread overview]
Message-ID: <lsq.1541965745.572177981@decadent.org.uk> (raw)
In-Reply-To: <lsq.1541965744.387173642@decadent.org.uk>

3.16.61-rc1 review patch.  If anyone has any objections, please let me know.

------------------

From: Paul Burton <paul.burton@mips.com>

commit 38c0a74fe06da3be133cae3fb7bde6a9438e698b upstream.

The MIPS implementation of pci_resource_to_user() introduced in v3.12 by
commit 4c2924b725fb ("MIPS: PCI: Use pci_resource_to_user to map pci
memory space properly") incorrectly sets *end to the address of the
byte after the resource, rather than the last byte of the resource.

This results in userland seeing resources as a byte larger than they
actually are, for example a 32 byte BAR will be reported by a tool such
as lspci as being 33 bytes in size:

    Region 2: I/O ports at 1000 [disabled] [size=33]

Correct this by subtracting one from the calculated end address,
reporting the correct address to userland.

Signed-off-by: Paul Burton <paul.burton@mips.com>
Reported-by: Rui Wang <rui.wang@windriver.com>
Fixes: 4c2924b725fb ("MIPS: PCI: Use pci_resource_to_user to map pci memory space properly")
Cc: James Hogan <jhogan@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Wolfgang Grandegger <wg@grandegger.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/19829/
[bwh: Backported to 3.16: adjust filename]
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
---
 arch/mips/include/asm/pci.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- a/arch/mips/include/asm/pci.h
+++ b/arch/mips/include/asm/pci.h
@@ -87,7 +87,7 @@ static inline void pci_resource_to_user(
 	phys_t size = resource_size(rsrc);
 
 	*start = fixup_bigphys_addr(rsrc->start, size);
-	*end = rsrc->start + size;
+	*end = rsrc->start + size - 1;
 }
 
 /*

  parent reply	other threads:[~2018-11-11 19:59 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <lsq.1541965744.387173642@decadent.org.uk>
2018-11-11 19:49 ` [PATCH 3.16 348/366] MIPS: asmmacro: Ensure 64-bit FP registers are used with MSA Ben Hutchings
2018-11-11 19:49 ` Ben Hutchings [this message]
2018-11-11 19:49 ` [PATCH 3.16 156/366] MIPS: io: Add barrier after register read in inX() Ben Hutchings
2018-11-11 19:49 ` [PATCH 3.16 151/366] MIPS: BCM47XX: Enable 74K Core ExternalSync for PCIe erratum Ben Hutchings
2018-11-11 20:17   ` Rafał Miłecki
2018-11-20 17:51     ` Ben Hutchings
2018-11-11 19:49 ` [PATCH 3.16 183/366] time: Make sure jiffies_to_msecs() preserves non-zero time periods Ben Hutchings

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