From: Ben Hutchings <ben@decadent.org.uk>
To: linux-kernel@vger.kernel.org, stable@vger.kernel.org
Cc: akpm@linux-foundation.org, "Ralf Baechle" <ralf@linux-mips.org>,
"Markos Chandras" <markos.chandras@imgtec.com>,
"Paul Burton" <paul.burton@imgtec.com>,
linux-mips@linux-mips.org, "James Hogan" <james.hogan@imgtec.com>
Subject: [PATCH 3.16 348/366] MIPS: asmmacro: Ensure 64-bit FP registers are used with MSA
Date: Sun, 11 Nov 2018 19:49:05 +0000 [thread overview]
Message-ID: <lsq.1541965745.811545133@decadent.org.uk> (raw)
In-Reply-To: <lsq.1541965744.387173642@decadent.org.uk>
3.16.61-rc1 review patch. If anyone has any objections, please let me know.
------------------
From: Markos Chandras <markos.chandras@imgtec.com>
commit 2bd7bc254ab1f45269db6dd7957d63b713817408 upstream.
This silences warnings like the following one when building with the
latest binutils:
arch/mips/kernel/genex.S: Assembler messages:
arch/mips/kernel/genex.S:438: Warning: the `msa' extension requires 64-bit FPRs
[ralf@linux-mips.org: Markos says binutils 2.25 and some 2.24 snapshots
are affected.]
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9745/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
---
arch/mips/include/asm/asmmacro.h | 11 +++++++++++
1 file changed, 11 insertions(+)
--- a/arch/mips/include/asm/asmmacro.h
+++ b/arch/mips/include/asm/asmmacro.h
@@ -209,9 +209,13 @@
.endm
#ifdef TOOLCHAIN_SUPPORTS_MSA
+/* preprocessor replaces the fp in ".set fp=64" with $30 otherwise */
+#undef fp
+
.macro _cfcmsa rd, cs
.set push
.set mips32r2
+ .set fp=64
.set msa
cfcmsa \rd, $\cs
.set pop
@@ -220,6 +224,7 @@
.macro _ctcmsa cd, rs
.set push
.set mips32r2
+ .set fp=64
.set msa
ctcmsa $\cd, \rs
.set pop
@@ -228,6 +233,7 @@
.macro ld_d wd, off, base
.set push
.set mips32r2
+ .set fp=64
.set msa
ld.d $w\wd, \off(\base)
.set pop
@@ -236,6 +242,7 @@
.macro st_d wd, off, base
.set push
.set mips32r2
+ .set fp=64
.set msa
st.d $w\wd, \off(\base)
.set pop
@@ -244,6 +251,7 @@
.macro copy_u_w ws, n
.set push
.set mips32r2
+ .set fp=64
.set msa
copy_u.w $1, $w\ws[\n]
.set pop
@@ -252,6 +260,7 @@
.macro copy_u_d ws, n
.set push
.set mips64r2
+ .set fp=64
.set msa
copy_u.d $1, $w\ws[\n]
.set pop
@@ -260,6 +269,7 @@
.macro insert_w wd, n
.set push
.set mips32r2
+ .set fp=64
.set msa
insert.w $w\wd[\n], $1
.set pop
@@ -268,6 +278,7 @@
.macro insert_d wd, n
.set push
.set mips64r2
+ .set fp=64
.set msa
insert.d $w\wd[\n], $1
.set pop
next prev parent reply other threads:[~2018-11-11 19:58 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <lsq.1541965744.387173642@decadent.org.uk>
2018-11-11 19:49 ` [PATCH 3.16 151/366] MIPS: BCM47XX: Enable 74K Core ExternalSync for PCIe erratum Ben Hutchings
2018-11-11 20:17 ` Rafał Miłecki
2018-11-20 17:51 ` Ben Hutchings
2018-11-11 19:49 ` [PATCH 3.16 183/366] time: Make sure jiffies_to_msecs() preserves non-zero time periods Ben Hutchings
2018-11-11 19:49 ` Ben Hutchings [this message]
2018-11-11 19:49 ` [PATCH 3.16 261/366] MIPS: Fix off-by-one in pci_resource_to_user() Ben Hutchings
2018-11-11 19:49 ` [PATCH 3.16 156/366] MIPS: io: Add barrier after register read in inX() Ben Hutchings
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