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From: Luiz Capitulino <luizcap@redhat.com>
To: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: Lance Yang <lance.yang@linux.dev>,
	corbet@lwn.net, ziy@nvidia.com, baolin.wang@linux.alibaba.com,
	maddy@linux.ibm.com, mpe@ellerman.id.au, agordeev@linux.ibm.com,
	gerald.schaefer@linux.ibm.com, david@kernel.org,
	hca@linux.ibm.com, gor@linux.ibm.com, x86@kernel.org,
	tglx@kernel.org, mingo@redhat.com, bp@alien8.de,
	hughd@google.com, linux-kernel@vger.kernel.org,
	dave.hansen@linux.intel.com, djbw@kernel.org,
	vishal.l.verma@intel.com, dave.jiang@intel.com,
	akpm@linux-foundation.org, yintirui@huawei.com, dev.jain@arm.com,
	usama.arif@linux.dev, linux-mm@kvack.org
Subject: Re: [PATCH v7 10/14] mips: move has_transparent_hugepage() out of THP guard
Date: Wed, 2 Sep 2026 11:12:40 -0400	[thread overview]
Message-ID: <2802ba90-fee8-455b-9858-a6bcd0212c46@redhat.com> (raw)
In-Reply-To: <apdQ2FJrLhkdjh_n@alpha.franken.de>

On 2026-09-01 18:25, Thomas Bogendoerfer wrote:
> On Tue, Sep 01, 2026 at 03:53:18PM -0400, Luiz Capitulino wrote:
>> On 2026-09-01 07:42, Lance Yang wrote:
>>>
>>>
>>> On 2026/9/1 11:12, Luiz Capitulino wrote:
>>>> A future commit will introduce a kernel API to allow for checking if the
>>>> CPU supports PMD-sized pages. This API will be based on the
>>>> has_transparent_hugepage() implementation but will be orthogonal to THP
>>>> and therefore must work when CONFIG_TRANSPARENT_HUGEPAGE=n.
>>>>
>>>> Move its definition out of the THP guard.
>>>>
>>>> Signed-off-by: Luiz Capitulino <luizcap@redhat.com>
>>>> ---
>>>>    arch/mips/include/asm/pgtable.h | 6 +++---
>>>>    arch/mips/mm/tlb-r4k.c          | 4 ----
>>>>    2 files changed, 3 insertions(+), 7 deletions(-)
>>>>
>>>> diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h
>>>> index fa7b935f947c..b038da872ec6 100644
>>>> --- a/arch/mips/include/asm/pgtable.h
>>>> +++ b/arch/mips/include/asm/pgtable.h
>>>> @@ -615,9 +615,6 @@ unsigned long io_remap_pfn_range_pfn(unsigned long pfn, unsigned long size);
>>>>    /* We don't have hardware dirty/accessed bits, generic_pmdp_establish is fine.*/
>>>>    #define pmdp_establish generic_pmdp_establish
>>>> -#define has_transparent_hugepage has_transparent_hugepage
>>>> -extern int has_transparent_hugepage(void);
>>>
>>> Assume a decstation_defconfig build. CPU_R3000 selects CPU_R3K_TLB, so the
>>> Makefile builds tlb-r3k.o but not tlb-r4k.o IIUC ...
>>>
>>> The only MIPS definition is in tlb-r4k.c, so R3000 would fail to link with
>>> an undefined reference ... no?
>>
>> Yes, you're right. I can reproduce this. Would the solution below be
>> acceptable?
>>
>> diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h
>> index fa7b935f947c..b038da872ec6 100644
>> --- a/arch/mips/include/asm/pgtable.h
>> +++ b/arch/mips/include/asm/pgtable.h
>> @@ -615,9 +615,6 @@ unsigned long io_remap_pfn_range_pfn(unsigned long pfn, unsigned long size);
>>   /* We don't have hardware dirty/accessed bits, generic_pmdp_establish is fine.*/
>>   #define pmdp_establish generic_pmdp_establish
>> -#define has_transparent_hugepage has_transparent_hugepage
>> -extern int has_transparent_hugepage(void);
>> -
>>   static inline int pmd_trans_huge(pmd_t pmd)
>>   {
>>   	return !!(pmd_val(pmd) & _PAGE_HUGE);
>> @@ -743,6 +740,9 @@ static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
>>   #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
>> +#define has_transparent_hugepage has_transparent_hugepage
>> +extern int has_transparent_hugepage(void);
>> +
>>   #ifdef _PAGE_HUGE
>>   #define pmd_leaf(pmd)	((pmd_val(pmd) & _PAGE_HUGE) != 0)
>>   #define pud_leaf(pud)	((pud_val(pud) & _PAGE_HUGE) != 0)
>> diff --git a/arch/mips/mm/pgtable.c b/arch/mips/mm/pgtable.c
>> index 10835414819f..3a5b411493d9 100644
>> --- a/arch/mips/mm/pgtable.c
>> +++ b/arch/mips/mm/pgtable.c
>> @@ -23,3 +23,30 @@ pgd_t *pgd_alloc(struct mm_struct *mm)
>>   	return ret;
>>   }
>>   EXPORT_SYMBOL_GPL(pgd_alloc);
>> +
>> +#if defined(CONFIG_CPU_R4K_CACHE_TLB) || \
>> +    defined(CONFIG_CPU_SB1) || \
>> +    defined(CONFIG_CPU_CAVIUM_OCTEON)
> 
> I guess using CONFIG_CPU_SUPPORTS_HUGEPAGES is a better approach

Makes sense. Updated patch below.

Subject: [PATCH 10/14] mips: move has_transparent_hugepage() out of THP guard

A future commit will introduce a kernel API to allow for checking if the
CPU supports PMD-sized pages. This API will be based on the
has_transparent_hugepage() implementation but will be orthogonal to THP
and therefore must work when CONFIG_TRANSPARENT_HUGEPAGE=n.

This commit moves has_transparent_hugepage() definition to
arch/mips/mm/pgtable.c under CONFIG_CPU_SUPPORTS_HUGEPAGES guard in
order to ensure that it's only used in CPUs that support the register
operations performed.

Signed-off-by: Luiz Capitulino <luizcap@redhat.com>
---
  arch/mips/include/asm/pgtable.h |  6 +++---
  arch/mips/mm/pgtable.c          | 25 +++++++++++++++++++++++++
  arch/mips/mm/tlb-r4k.c          | 22 ----------------------
  3 files changed, 28 insertions(+), 25 deletions(-)

diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h
index fa7b935f947c..b038da872ec6 100644
--- a/arch/mips/include/asm/pgtable.h
+++ b/arch/mips/include/asm/pgtable.h
@@ -615,9 +615,6 @@ unsigned long io_remap_pfn_range_pfn(unsigned long pfn, unsigned long size);
  /* We don't have hardware dirty/accessed bits, generic_pmdp_establish is fine.*/
  #define pmdp_establish generic_pmdp_establish
  
-#define has_transparent_hugepage has_transparent_hugepage
-extern int has_transparent_hugepage(void);
-
  static inline int pmd_trans_huge(pmd_t pmd)
  {
  	return !!(pmd_val(pmd) & _PAGE_HUGE);
@@ -743,6 +740,9 @@ static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
  
  #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
  
+#define has_transparent_hugepage has_transparent_hugepage
+extern int has_transparent_hugepage(void);
+
  #ifdef _PAGE_HUGE
  #define pmd_leaf(pmd)	((pmd_val(pmd) & _PAGE_HUGE) != 0)
  #define pud_leaf(pud)	((pud_val(pud) & _PAGE_HUGE) != 0)
diff --git a/arch/mips/mm/pgtable.c b/arch/mips/mm/pgtable.c
index 10835414819f..4515fa42f0b3 100644
--- a/arch/mips/mm/pgtable.c
+++ b/arch/mips/mm/pgtable.c
@@ -23,3 +23,28 @@ pgd_t *pgd_alloc(struct mm_struct *mm)
  	return ret;
  }
  EXPORT_SYMBOL_GPL(pgd_alloc);
+
+#ifdef CONFIG_CPU_SUPPORTS_HUGEPAGES
+int has_transparent_hugepage(void)
+{
+	static unsigned int mask = -1;
+
+	if (mask == -1) {	/* first call comes during __init */
+		unsigned long flags;
+
+		local_irq_save(flags);
+		write_c0_pagemask(PM_HUGE_MASK);
+		back_to_back_c0_hazard();
+		mask = read_c0_pagemask();
+		write_c0_pagemask(PM_DEFAULT_MASK);
+		local_irq_restore(flags);
+	}
+	return mask == PM_HUGE_MASK;
+}
+#else
+int has_transparent_hugepage(void)
+{
+	return 0;
+}
+#endif
+EXPORT_SYMBOL(has_transparent_hugepage);
diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
index 24fe85fa169d..625f1c0dd71e 100644
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -432,28 +432,6 @@ void add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
  #endif
  }
  
-#ifdef CONFIG_TRANSPARENT_HUGEPAGE
-
-int has_transparent_hugepage(void)
-{
-	static unsigned int mask = -1;
-
-	if (mask == -1) {	/* first call comes during __init */
-		unsigned long flags;
-
-		local_irq_save(flags);
-		write_c0_pagemask(PM_HUGE_MASK);
-		back_to_back_c0_hazard();
-		mask = read_c0_pagemask();
-		write_c0_pagemask(PM_DEFAULT_MASK);
-		local_irq_restore(flags);
-	}
-	return mask == PM_HUGE_MASK;
-}
-EXPORT_SYMBOL(has_transparent_hugepage);
-
-#endif /* CONFIG_TRANSPARENT_HUGEPAGE  */
-
  /*
   * Used for loading TLB entries before trap_init() has started, when we
   * don't actually want to add a wired entry which remains throughout the
-- 
2.55.0



  reply	other threads:[~2026-09-02 15:13 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-01  3:12 [PATCH v7 00/14] mm: thp: always enable mTHP support Luiz Capitulino
2026-09-01  3:12 ` [PATCH v7 01/14] docs: tmpfs: remove implementation detail reference Luiz Capitulino
2026-09-01  3:12 ` [PATCH v7 02/14] mm: shmem: shmem_getattr(): set blksize to highest supported THP order Luiz Capitulino
2026-09-01  3:12 ` [PATCH v7 03/14] mm: introduce pgtable_has_pmd_leaves() Luiz Capitulino
2026-09-01  3:12 ` [PATCH v7 04/14] drivers: dax: use pgtable_has_pmd_leaves() Luiz Capitulino
2026-09-01  3:12 ` [PATCH v7 05/14] drivers: nvdimm: " Luiz Capitulino
2026-09-01  3:12 ` [PATCH v7 06/14] mm: debug_vm_pgtable: " Luiz Capitulino
2026-09-01  3:12 ` [PATCH v7 07/14] mm: shmem: allow THP support determination at folio allocation time Luiz Capitulino
2026-09-01  3:12 ` [PATCH v7 08/14] s390: move has_transparent_hugepage() out of THP guard Luiz Capitulino
2026-09-01  3:12 ` [PATCH v7 09/14] powerpc: " Luiz Capitulino
2026-09-01  3:12 ` [PATCH v7 10/14] mips: " Luiz Capitulino
2026-09-01 11:42   ` Lance Yang
2026-09-01 19:53     ` Luiz Capitulino
2026-09-01 22:25       ` Thomas Bogendoerfer
2026-09-02 15:12         ` Luiz Capitulino [this message]
2026-09-01  3:12 ` [PATCH v7 11/14] x86: " Luiz Capitulino
2026-09-01  3:12 ` [PATCH v7 12/14] treewide: introduce arch_has_pmd_leaves() Luiz Capitulino
2026-09-01  3:12 ` [PATCH v7 13/14] mm: replace thp_disabled_by_hw() with pgtable_has_pmd_leaves() Luiz Capitulino
2026-09-01  3:12 ` [PATCH v7 14/14] mm: thp: always enable mTHP support Luiz Capitulino

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