* [PATCH 2/2] mmc: sdhci-of-esdhc: avoid clock glitch when frequency is changing
2016-11-25 4:00 [PATCH 1/2] mmc: sdhci-esdhc: clean up register definitions Yangbo Lu
@ 2016-11-25 4:00 ` Yangbo Lu
2016-12-02 2:36 ` [PATCH 1/2] mmc: sdhci-esdhc: clean up register definitions Y.B. Lu
` (2 subsequent siblings)
3 siblings, 0 replies; 7+ messages in thread
From: Yangbo Lu @ 2016-11-25 4:00 UTC (permalink / raw)
To: linux-mmc, ulf.hansson; +Cc: Xiaobo Xie, Yangbo Lu
The eSDHC_PRSSTAT[SDSTB] bit indicates whether the internal card clock is
stable. This bit is for the host driver to poll clock status when changing
the clock frequency. It is recommended to clear eSDHC_SYSCTL[SDCLKEN]
to remove glitch on the card clock when the frequency is changing. This
patch is to disable SDCLKEN bit before changing frequency and enable it
after SDSTB bit is set.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
---
drivers/mmc/host/sdhci-esdhc.h | 5 +++++
drivers/mmc/host/sdhci-of-esdhc.c | 21 ++++++++++++++++++---
2 files changed, 23 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h
index 8cd8449..ece8b37 100644
--- a/drivers/mmc/host/sdhci-esdhc.h
+++ b/drivers/mmc/host/sdhci-esdhc.h
@@ -31,6 +31,10 @@
* eSDHC register definition
*/
+/* Present State Register */
+#define ESDHC_PRSSTAT 0x24
+#define ESDHC_CLOCK_STABLE 0x00000008
+
/* Protocol Control Register */
#define ESDHC_PROCTL 0x28
#define ESDHC_CTRL_4BITBUS (0x1 << 1)
@@ -43,6 +47,7 @@
#define ESDHC_CLOCK_MASK 0x0000fff0
#define ESDHC_PREDIV_SHIFT 8
#define ESDHC_DIVIDER_SHIFT 4
+#define ESDHC_CLOCK_SDCLKEN 0x00000008
#define ESDHC_CLOCK_PEREN 0x00000004
#define ESDHC_CLOCK_HCKEN 0x00000002
#define ESDHC_CLOCK_IPGEN 0x00000001
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
index 9a6eb44..0849885 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -431,6 +431,7 @@ static void esdhc_of_set_clock(struct sdhci_host *host, unsigned int clock)
struct sdhci_esdhc *esdhc = sdhci_pltfm_priv(pltfm_host);
int pre_div = 1;
int div = 1;
+ u32 timeout;
u32 temp;
host->mmc->actual_clock = 0;
@@ -451,8 +452,8 @@ static void esdhc_of_set_clock(struct sdhci_host *host, unsigned int clock)
}
temp = sdhci_readl(host, ESDHC_SYSTEM_CONTROL);
- temp &= ~(ESDHC_CLOCK_IPGEN | ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN
- | ESDHC_CLOCK_MASK);
+ temp &= ~(ESDHC_CLOCK_SDCLKEN | ESDHC_CLOCK_IPGEN | ESDHC_CLOCK_HCKEN |
+ ESDHC_CLOCK_PEREN | ESDHC_CLOCK_MASK);
sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL);
while (host->max_clk / pre_div / 16 > clock && pre_div < 256)
@@ -472,7 +473,21 @@ static void esdhc_of_set_clock(struct sdhci_host *host, unsigned int clock)
| (div << ESDHC_DIVIDER_SHIFT)
| (pre_div << ESDHC_PREDIV_SHIFT));
sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL);
- mdelay(1);
+
+ /* Wait max 20 ms */
+ timeout = 20;
+ while (!(sdhci_readl(host, ESDHC_PRSSTAT) & ESDHC_CLOCK_STABLE)) {
+ if (timeout == 0) {
+ pr_err("%s: Internal clock never stabilised.\n",
+ mmc_hostname(host->mmc));
+ return;
+ }
+ timeout--;
+ mdelay(1);
+ }
+
+ temp |= ESDHC_CLOCK_SDCLKEN;
+ sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL);
}
static void esdhc_pltfm_set_bus_width(struct sdhci_host *host, int width)
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 7+ messages in thread* RE: [PATCH 1/2] mmc: sdhci-esdhc: clean up register definitions
2016-11-25 4:00 [PATCH 1/2] mmc: sdhci-esdhc: clean up register definitions Yangbo Lu
2016-11-25 4:00 ` [PATCH 2/2] mmc: sdhci-of-esdhc: avoid clock glitch when frequency is changing Yangbo Lu
@ 2016-12-02 2:36 ` Y.B. Lu
2016-12-09 3:23 ` Y.B. Lu
2016-12-21 10:06 ` Y.B. Lu
3 siblings, 0 replies; 7+ messages in thread
From: Y.B. Lu @ 2016-12-02 2:36 UTC (permalink / raw)
To: linux-mmc@vger.kernel.org, ulf.hansson@linaro.org; +Cc: Xiaobo Xie
Any comments on this patchset?
Thanks.
Best regards,
Yangbo Lu
> -----Original Message-----
> From: Yangbo Lu [mailto:yangbo.lu@nxp.com]
> Sent: Friday, November 25, 2016 12:01 PM
> To: linux-mmc@vger.kernel.org; ulf.hansson@linaro.org
> Cc: Xiaobo Xie; Y.B. Lu
> Subject: [PATCH 1/2] mmc: sdhci-esdhc: clean up register definitions
>
> The eSDHC register definitions in header file were messy and confusing.
> This patch is to clean up these definitions.
>
> Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> ---
> drivers/mmc/host/sdhci-esdhc.h | 39 ++++++++++++++++++++----------------
> ---
> 1 file changed, 20 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-
> esdhc.h index de132e2..8cd8449 100644
> --- a/drivers/mmc/host/sdhci-esdhc.h
> +++ b/drivers/mmc/host/sdhci-esdhc.h
> @@ -24,30 +24,31 @@
> SDHCI_QUIRK_PIO_NEEDS_DELAY | \
> SDHCI_QUIRK_NO_HISPD_BIT)
>
> -#define ESDHC_PROCTL 0x28
> -
> -#define ESDHC_SYSTEM_CONTROL 0x2c
> -#define ESDHC_CLOCK_MASK 0x0000fff0
> -#define ESDHC_PREDIV_SHIFT 8
> -#define ESDHC_DIVIDER_SHIFT 4
> -#define ESDHC_CLOCK_PEREN 0x00000004
> -#define ESDHC_CLOCK_HCKEN 0x00000002
> -#define ESDHC_CLOCK_IPGEN 0x00000001
> -
> /* pltfm-specific */
> #define ESDHC_HOST_CONTROL_LE 0x20
>
> /*
> - * P2020 interpretation of the SDHCI_HOST_CONTROL register
> + * eSDHC register definition
> */
> -#define ESDHC_CTRL_4BITBUS (0x1 << 1)
> -#define ESDHC_CTRL_8BITBUS (0x2 << 1)
> -#define ESDHC_CTRL_BUSWIDTH_MASK (0x3 << 1)
> -
> -/* OF-specific */
> -#define ESDHC_DMA_SYSCTL 0x40c
> -#define ESDHC_DMA_SNOOP 0x00000040
>
> -#define ESDHC_HOST_CONTROL_RES 0x01
> +/* Protocol Control Register */
> +#define ESDHC_PROCTL 0x28
> +#define ESDHC_CTRL_4BITBUS (0x1 << 1)
> +#define ESDHC_CTRL_8BITBUS (0x2 << 1)
> +#define ESDHC_CTRL_BUSWIDTH_MASK (0x3 << 1)
> +#define ESDHC_HOST_CONTROL_RES 0x01
> +
> +/* System Control Register */
> +#define ESDHC_SYSTEM_CONTROL 0x2c
> +#define ESDHC_CLOCK_MASK 0x0000fff0
> +#define ESDHC_PREDIV_SHIFT 8
> +#define ESDHC_DIVIDER_SHIFT 4
> +#define ESDHC_CLOCK_PEREN 0x00000004
> +#define ESDHC_CLOCK_HCKEN 0x00000002
> +#define ESDHC_CLOCK_IPGEN 0x00000001
> +
> +/* Control Register for DMA transfer */
> +#define ESDHC_DMA_SYSCTL 0x40c
> +#define ESDHC_DMA_SNOOP 0x00000040
>
> #endif /* _DRIVERS_MMC_SDHCI_ESDHC_H */
> --
> 2.1.0.27.g96db324
^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [PATCH 1/2] mmc: sdhci-esdhc: clean up register definitions
2016-11-25 4:00 [PATCH 1/2] mmc: sdhci-esdhc: clean up register definitions Yangbo Lu
2016-11-25 4:00 ` [PATCH 2/2] mmc: sdhci-of-esdhc: avoid clock glitch when frequency is changing Yangbo Lu
2016-12-02 2:36 ` [PATCH 1/2] mmc: sdhci-esdhc: clean up register definitions Y.B. Lu
@ 2016-12-09 3:23 ` Y.B. Lu
2016-12-21 10:06 ` Y.B. Lu
3 siblings, 0 replies; 7+ messages in thread
From: Y.B. Lu @ 2016-12-09 3:23 UTC (permalink / raw)
To: linux-mmc@vger.kernel.org, ulf.hansson@linaro.org; +Cc: Xiaobo Xie
Hi Uffe,
Could you help to review and merge these two patches?
Thanks.
Best regards,
Yangbo Lu
> -----Original Message-----
> From: Y.B. Lu
> Sent: Friday, December 02, 2016 10:37 AM
> To: linux-mmc@vger.kernel.org; ulf.hansson@linaro.org
> Cc: X.B. Xie
> Subject: RE: [PATCH 1/2] mmc: sdhci-esdhc: clean up register definitions
>
> Any comments on this patchset?
> Thanks.
>
>
> Best regards,
> Yangbo Lu
>
> > -----Original Message-----
> > From: Yangbo Lu [mailto:yangbo.lu@nxp.com]
> > Sent: Friday, November 25, 2016 12:01 PM
> > To: linux-mmc@vger.kernel.org; ulf.hansson@linaro.org
> > Cc: Xiaobo Xie; Y.B. Lu
> > Subject: [PATCH 1/2] mmc: sdhci-esdhc: clean up register definitions
> >
> > The eSDHC register definitions in header file were messy and confusing.
> > This patch is to clean up these definitions.
> >
> > Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> > ---
> > drivers/mmc/host/sdhci-esdhc.h | 39
> > ++++++++++++++++++++----------------
> > ---
> > 1 file changed, 20 insertions(+), 19 deletions(-)
> >
> > diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-
> > esdhc.h index de132e2..8cd8449 100644
> > --- a/drivers/mmc/host/sdhci-esdhc.h
> > +++ b/drivers/mmc/host/sdhci-esdhc.h
> > @@ -24,30 +24,31 @@
> > SDHCI_QUIRK_PIO_NEEDS_DELAY | \
> > SDHCI_QUIRK_NO_HISPD_BIT)
> >
> > -#define ESDHC_PROCTL 0x28
> > -
> > -#define ESDHC_SYSTEM_CONTROL 0x2c
> > -#define ESDHC_CLOCK_MASK 0x0000fff0
> > -#define ESDHC_PREDIV_SHIFT 8
> > -#define ESDHC_DIVIDER_SHIFT 4
> > -#define ESDHC_CLOCK_PEREN 0x00000004
> > -#define ESDHC_CLOCK_HCKEN 0x00000002
> > -#define ESDHC_CLOCK_IPGEN 0x00000001
> > -
> > /* pltfm-specific */
> > #define ESDHC_HOST_CONTROL_LE 0x20
> >
> > /*
> > - * P2020 interpretation of the SDHCI_HOST_CONTROL register
> > + * eSDHC register definition
> > */
> > -#define ESDHC_CTRL_4BITBUS (0x1 << 1)
> > -#define ESDHC_CTRL_8BITBUS (0x2 << 1)
> > -#define ESDHC_CTRL_BUSWIDTH_MASK (0x3 << 1)
> > -
> > -/* OF-specific */
> > -#define ESDHC_DMA_SYSCTL 0x40c
> > -#define ESDHC_DMA_SNOOP 0x00000040
> >
> > -#define ESDHC_HOST_CONTROL_RES 0x01
> > +/* Protocol Control Register */
> > +#define ESDHC_PROCTL 0x28
> > +#define ESDHC_CTRL_4BITBUS (0x1 << 1)
> > +#define ESDHC_CTRL_8BITBUS (0x2 << 1)
> > +#define ESDHC_CTRL_BUSWIDTH_MASK (0x3 << 1)
> > +#define ESDHC_HOST_CONTROL_RES 0x01
> > +
> > +/* System Control Register */
> > +#define ESDHC_SYSTEM_CONTROL 0x2c
> > +#define ESDHC_CLOCK_MASK 0x0000fff0
> > +#define ESDHC_PREDIV_SHIFT 8
> > +#define ESDHC_DIVIDER_SHIFT 4
> > +#define ESDHC_CLOCK_PEREN 0x00000004
> > +#define ESDHC_CLOCK_HCKEN 0x00000002
> > +#define ESDHC_CLOCK_IPGEN 0x00000001
> > +
> > +/* Control Register for DMA transfer */
> > +#define ESDHC_DMA_SYSCTL 0x40c
> > +#define ESDHC_DMA_SNOOP 0x00000040
> >
> > #endif /* _DRIVERS_MMC_SDHCI_ESDHC_H */
> > --
> > 2.1.0.27.g96db324
^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [PATCH 1/2] mmc: sdhci-esdhc: clean up register definitions
2016-11-25 4:00 [PATCH 1/2] mmc: sdhci-esdhc: clean up register definitions Yangbo Lu
` (2 preceding siblings ...)
2016-12-09 3:23 ` Y.B. Lu
@ 2016-12-21 10:06 ` Y.B. Lu
2016-12-21 10:13 ` Ulf Hansson
3 siblings, 1 reply; 7+ messages in thread
From: Y.B. Lu @ 2016-12-21 10:06 UTC (permalink / raw)
To: linux-mmc@vger.kernel.org, ulf.hansson@linaro.org; +Cc: Xiaobo Xie
Hi Uffe,
Did you have a chance to look at this?
Thanks a lot:)
Best regards,
Yangbo Lu
> -----Original Message-----
> From: Y.B. Lu
> Sent: Friday, December 09, 2016 11:24 AM
> To: 'linux-mmc@vger.kernel.org'; 'ulf.hansson@linaro.org'
> Cc: X.B. Xie
> Subject: RE: [PATCH 1/2] mmc: sdhci-esdhc: clean up register definitions
>
> Hi Uffe,
>
> Could you help to review and merge these two patches?
> Thanks.
>
>
> Best regards,
> Yangbo Lu
>
> > -----Original Message-----
> > From: Y.B. Lu
> > Sent: Friday, December 02, 2016 10:37 AM
> > To: linux-mmc@vger.kernel.org; ulf.hansson@linaro.org
> > Cc: X.B. Xie
> > Subject: RE: [PATCH 1/2] mmc: sdhci-esdhc: clean up register
> > definitions
> >
> > Any comments on this patchset?
> > Thanks.
> >
> >
> > Best regards,
> > Yangbo Lu
> >
> > > -----Original Message-----
> > > From: Yangbo Lu [mailto:yangbo.lu@nxp.com]
> > > Sent: Friday, November 25, 2016 12:01 PM
> > > To: linux-mmc@vger.kernel.org; ulf.hansson@linaro.org
> > > Cc: Xiaobo Xie; Y.B. Lu
> > > Subject: [PATCH 1/2] mmc: sdhci-esdhc: clean up register definitions
> > >
> > > The eSDHC register definitions in header file were messy and
> confusing.
> > > This patch is to clean up these definitions.
> > >
> > > Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> > > ---
> > > drivers/mmc/host/sdhci-esdhc.h | 39
> > > ++++++++++++++++++++----------------
> > > ---
> > > 1 file changed, 20 insertions(+), 19 deletions(-)
> > >
> > > diff --git a/drivers/mmc/host/sdhci-esdhc.h
> > > b/drivers/mmc/host/sdhci- esdhc.h index de132e2..8cd8449 100644
> > > --- a/drivers/mmc/host/sdhci-esdhc.h
> > > +++ b/drivers/mmc/host/sdhci-esdhc.h
> > > @@ -24,30 +24,31 @@
> > > SDHCI_QUIRK_PIO_NEEDS_DELAY | \
> > > SDHCI_QUIRK_NO_HISPD_BIT)
> > >
> > > -#define ESDHC_PROCTL 0x28
> > > -
> > > -#define ESDHC_SYSTEM_CONTROL 0x2c
> > > -#define ESDHC_CLOCK_MASK 0x0000fff0
> > > -#define ESDHC_PREDIV_SHIFT 8
> > > -#define ESDHC_DIVIDER_SHIFT 4
> > > -#define ESDHC_CLOCK_PEREN 0x00000004
> > > -#define ESDHC_CLOCK_HCKEN 0x00000002
> > > -#define ESDHC_CLOCK_IPGEN 0x00000001
> > > -
> > > /* pltfm-specific */
> > > #define ESDHC_HOST_CONTROL_LE 0x20
> > >
> > > /*
> > > - * P2020 interpretation of the SDHCI_HOST_CONTROL register
> > > + * eSDHC register definition
> > > */
> > > -#define ESDHC_CTRL_4BITBUS (0x1 << 1)
> > > -#define ESDHC_CTRL_8BITBUS (0x2 << 1)
> > > -#define ESDHC_CTRL_BUSWIDTH_MASK (0x3 << 1)
> > > -
> > > -/* OF-specific */
> > > -#define ESDHC_DMA_SYSCTL 0x40c
> > > -#define ESDHC_DMA_SNOOP 0x00000040
> > >
> > > -#define ESDHC_HOST_CONTROL_RES 0x01
> > > +/* Protocol Control Register */
> > > +#define ESDHC_PROCTL 0x28
> > > +#define ESDHC_CTRL_4BITBUS (0x1 << 1)
> > > +#define ESDHC_CTRL_8BITBUS (0x2 << 1)
> > > +#define ESDHC_CTRL_BUSWIDTH_MASK (0x3 << 1)
> > > +#define ESDHC_HOST_CONTROL_RES 0x01
> > > +
> > > +/* System Control Register */
> > > +#define ESDHC_SYSTEM_CONTROL 0x2c
> > > +#define ESDHC_CLOCK_MASK 0x0000fff0
> > > +#define ESDHC_PREDIV_SHIFT 8
> > > +#define ESDHC_DIVIDER_SHIFT 4
> > > +#define ESDHC_CLOCK_PEREN 0x00000004
> > > +#define ESDHC_CLOCK_HCKEN 0x00000002
> > > +#define ESDHC_CLOCK_IPGEN 0x00000001
> > > +
> > > +/* Control Register for DMA transfer */
> > > +#define ESDHC_DMA_SYSCTL 0x40c
> > > +#define ESDHC_DMA_SNOOP 0x00000040
> > >
> > > #endif /* _DRIVERS_MMC_SDHCI_ESDHC_H */
> > > --
> > > 2.1.0.27.g96db324
^ permalink raw reply [flat|nested] 7+ messages in thread* Re: [PATCH 1/2] mmc: sdhci-esdhc: clean up register definitions
2016-12-21 10:06 ` Y.B. Lu
@ 2016-12-21 10:13 ` Ulf Hansson
2016-12-26 10:01 ` Y.B. Lu
0 siblings, 1 reply; 7+ messages in thread
From: Ulf Hansson @ 2016-12-21 10:13 UTC (permalink / raw)
To: Y.B. Lu; +Cc: linux-mmc@vger.kernel.org, Xiaobo Xie
On 21 December 2016 at 11:06, Y.B. Lu <yangbo.lu@nxp.com> wrote:
> Hi Uffe,
>
> Did you have a chance to look at this?
> Thanks a lot:)
Please resend/rebase once rc1 is out, and make sure to have Adrian in
the to field. Then I will wait for his ack.
Kind regards
Uffe
>
> Best regards,
> Yangbo Lu
>
>> -----Original Message-----
>> From: Y.B. Lu
>> Sent: Friday, December 09, 2016 11:24 AM
>> To: 'linux-mmc@vger.kernel.org'; 'ulf.hansson@linaro.org'
>> Cc: X.B. Xie
>> Subject: RE: [PATCH 1/2] mmc: sdhci-esdhc: clean up register definitions
>>
>> Hi Uffe,
>>
>> Could you help to review and merge these two patches?
>> Thanks.
>>
>>
>> Best regards,
>> Yangbo Lu
>>
>> > -----Original Message-----
>> > From: Y.B. Lu
>> > Sent: Friday, December 02, 2016 10:37 AM
>> > To: linux-mmc@vger.kernel.org; ulf.hansson@linaro.org
>> > Cc: X.B. Xie
>> > Subject: RE: [PATCH 1/2] mmc: sdhci-esdhc: clean up register
>> > definitions
>> >
>> > Any comments on this patchset?
>> > Thanks.
>> >
>> >
>> > Best regards,
>> > Yangbo Lu
>> >
>> > > -----Original Message-----
>> > > From: Yangbo Lu [mailto:yangbo.lu@nxp.com]
>> > > Sent: Friday, November 25, 2016 12:01 PM
>> > > To: linux-mmc@vger.kernel.org; ulf.hansson@linaro.org
>> > > Cc: Xiaobo Xie; Y.B. Lu
>> > > Subject: [PATCH 1/2] mmc: sdhci-esdhc: clean up register definitions
>> > >
>> > > The eSDHC register definitions in header file were messy and
>> confusing.
>> > > This patch is to clean up these definitions.
>> > >
>> > > Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
>> > > ---
>> > > drivers/mmc/host/sdhci-esdhc.h | 39
>> > > ++++++++++++++++++++----------------
>> > > ---
>> > > 1 file changed, 20 insertions(+), 19 deletions(-)
>> > >
>> > > diff --git a/drivers/mmc/host/sdhci-esdhc.h
>> > > b/drivers/mmc/host/sdhci- esdhc.h index de132e2..8cd8449 100644
>> > > --- a/drivers/mmc/host/sdhci-esdhc.h
>> > > +++ b/drivers/mmc/host/sdhci-esdhc.h
>> > > @@ -24,30 +24,31 @@
>> > > SDHCI_QUIRK_PIO_NEEDS_DELAY | \
>> > > SDHCI_QUIRK_NO_HISPD_BIT)
>> > >
>> > > -#define ESDHC_PROCTL 0x28
>> > > -
>> > > -#define ESDHC_SYSTEM_CONTROL 0x2c
>> > > -#define ESDHC_CLOCK_MASK 0x0000fff0
>> > > -#define ESDHC_PREDIV_SHIFT 8
>> > > -#define ESDHC_DIVIDER_SHIFT 4
>> > > -#define ESDHC_CLOCK_PEREN 0x00000004
>> > > -#define ESDHC_CLOCK_HCKEN 0x00000002
>> > > -#define ESDHC_CLOCK_IPGEN 0x00000001
>> > > -
>> > > /* pltfm-specific */
>> > > #define ESDHC_HOST_CONTROL_LE 0x20
>> > >
>> > > /*
>> > > - * P2020 interpretation of the SDHCI_HOST_CONTROL register
>> > > + * eSDHC register definition
>> > > */
>> > > -#define ESDHC_CTRL_4BITBUS (0x1 << 1)
>> > > -#define ESDHC_CTRL_8BITBUS (0x2 << 1)
>> > > -#define ESDHC_CTRL_BUSWIDTH_MASK (0x3 << 1)
>> > > -
>> > > -/* OF-specific */
>> > > -#define ESDHC_DMA_SYSCTL 0x40c
>> > > -#define ESDHC_DMA_SNOOP 0x00000040
>> > >
>> > > -#define ESDHC_HOST_CONTROL_RES 0x01
>> > > +/* Protocol Control Register */
>> > > +#define ESDHC_PROCTL 0x28
>> > > +#define ESDHC_CTRL_4BITBUS (0x1 << 1)
>> > > +#define ESDHC_CTRL_8BITBUS (0x2 << 1)
>> > > +#define ESDHC_CTRL_BUSWIDTH_MASK (0x3 << 1)
>> > > +#define ESDHC_HOST_CONTROL_RES 0x01
>> > > +
>> > > +/* System Control Register */
>> > > +#define ESDHC_SYSTEM_CONTROL 0x2c
>> > > +#define ESDHC_CLOCK_MASK 0x0000fff0
>> > > +#define ESDHC_PREDIV_SHIFT 8
>> > > +#define ESDHC_DIVIDER_SHIFT 4
>> > > +#define ESDHC_CLOCK_PEREN 0x00000004
>> > > +#define ESDHC_CLOCK_HCKEN 0x00000002
>> > > +#define ESDHC_CLOCK_IPGEN 0x00000001
>> > > +
>> > > +/* Control Register for DMA transfer */
>> > > +#define ESDHC_DMA_SYSCTL 0x40c
>> > > +#define ESDHC_DMA_SNOOP 0x00000040
>> > >
>> > > #endif /* _DRIVERS_MMC_SDHCI_ESDHC_H */
>> > > --
>> > > 2.1.0.27.g96db324
>
^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [PATCH 1/2] mmc: sdhci-esdhc: clean up register definitions
2016-12-21 10:13 ` Ulf Hansson
@ 2016-12-26 10:01 ` Y.B. Lu
0 siblings, 0 replies; 7+ messages in thread
From: Y.B. Lu @ 2016-12-26 10:01 UTC (permalink / raw)
To: Ulf Hansson, Adrian Hunter; +Cc: linux-mmc@vger.kernel.org, Xiaobo Xie
> -----Original Message-----
> From: Ulf Hansson [mailto:ulf.hansson@linaro.org]
> Sent: Wednesday, December 21, 2016 6:14 PM
> To: Y.B. Lu
> Cc: linux-mmc@vger.kernel.org; Xiaobo Xie
> Subject: Re: [PATCH 1/2] mmc: sdhci-esdhc: clean up register definitions
>
> On 21 December 2016 at 11:06, Y.B. Lu <yangbo.lu@nxp.com> wrote:
> > Hi Uffe,
> >
> > Did you have a chance to look at this?
> > Thanks a lot:)
>
> Please resend/rebase once rc1 is out, and make sure to have Adrian in the
> to field. Then I will wait for his ack.
>
[Lu Yangbo-B47093] Thanks for your reminding, Uffe. Sent out the patches with Adrian in To list.
> Kind regards
> Uffe
>
>
> >
> > Best regards,
> > Yangbo Lu
> >
> >> -----Original Message-----
> >> From: Y.B. Lu
> >> Sent: Friday, December 09, 2016 11:24 AM
> >> To: 'linux-mmc@vger.kernel.org'; 'ulf.hansson@linaro.org'
> >> Cc: X.B. Xie
> >> Subject: RE: [PATCH 1/2] mmc: sdhci-esdhc: clean up register
> >> definitions
> >>
> >> Hi Uffe,
> >>
> >> Could you help to review and merge these two patches?
> >> Thanks.
> >>
> >>
> >> Best regards,
> >> Yangbo Lu
> >>
> >> > -----Original Message-----
> >> > From: Y.B. Lu
> >> > Sent: Friday, December 02, 2016 10:37 AM
> >> > To: linux-mmc@vger.kernel.org; ulf.hansson@linaro.org
> >> > Cc: X.B. Xie
> >> > Subject: RE: [PATCH 1/2] mmc: sdhci-esdhc: clean up register
> >> > definitions
> >> >
> >> > Any comments on this patchset?
> >> > Thanks.
> >> >
> >> >
> >> > Best regards,
> >> > Yangbo Lu
> >> >
> >> > > -----Original Message-----
> >> > > From: Yangbo Lu [mailto:yangbo.lu@nxp.com]
> >> > > Sent: Friday, November 25, 2016 12:01 PM
> >> > > To: linux-mmc@vger.kernel.org; ulf.hansson@linaro.org
> >> > > Cc: Xiaobo Xie; Y.B. Lu
> >> > > Subject: [PATCH 1/2] mmc: sdhci-esdhc: clean up register
> >> > > definitions
> >> > >
> >> > > The eSDHC register definitions in header file were messy and
> >> confusing.
> >> > > This patch is to clean up these definitions.
> >> > >
> >> > > Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> >> > > ---
> >> > > drivers/mmc/host/sdhci-esdhc.h | 39
> >> > > ++++++++++++++++++++----------------
> >> > > ---
> >> > > 1 file changed, 20 insertions(+), 19 deletions(-)
> >> > >
> >> > > diff --git a/drivers/mmc/host/sdhci-esdhc.h
> >> > > b/drivers/mmc/host/sdhci- esdhc.h index de132e2..8cd8449 100644
> >> > > --- a/drivers/mmc/host/sdhci-esdhc.h
> >> > > +++ b/drivers/mmc/host/sdhci-esdhc.h
> >> > > @@ -24,30 +24,31 @@
> >> > > SDHCI_QUIRK_PIO_NEEDS_DELAY | \
> >> > > SDHCI_QUIRK_NO_HISPD_BIT)
> >> > >
> >> > > -#define ESDHC_PROCTL 0x28
> >> > > -
> >> > > -#define ESDHC_SYSTEM_CONTROL 0x2c
> >> > > -#define ESDHC_CLOCK_MASK 0x0000fff0
> >> > > -#define ESDHC_PREDIV_SHIFT 8
> >> > > -#define ESDHC_DIVIDER_SHIFT 4
> >> > > -#define ESDHC_CLOCK_PEREN 0x00000004
> >> > > -#define ESDHC_CLOCK_HCKEN 0x00000002
> >> > > -#define ESDHC_CLOCK_IPGEN 0x00000001
> >> > > -
> >> > > /* pltfm-specific */
> >> > > #define ESDHC_HOST_CONTROL_LE 0x20
> >> > >
> >> > > /*
> >> > > - * P2020 interpretation of the SDHCI_HOST_CONTROL register
> >> > > + * eSDHC register definition
> >> > > */
> >> > > -#define ESDHC_CTRL_4BITBUS (0x1 << 1)
> >> > > -#define ESDHC_CTRL_8BITBUS (0x2 << 1)
> >> > > -#define ESDHC_CTRL_BUSWIDTH_MASK (0x3 << 1)
> >> > > -
> >> > > -/* OF-specific */
> >> > > -#define ESDHC_DMA_SYSCTL 0x40c
> >> > > -#define ESDHC_DMA_SNOOP 0x00000040
> >> > >
> >> > > -#define ESDHC_HOST_CONTROL_RES 0x01
> >> > > +/* Protocol Control Register */
> >> > > +#define ESDHC_PROCTL 0x28
> >> > > +#define ESDHC_CTRL_4BITBUS (0x1 << 1)
> >> > > +#define ESDHC_CTRL_8BITBUS (0x2 << 1)
> >> > > +#define ESDHC_CTRL_BUSWIDTH_MASK (0x3 << 1)
> >> > > +#define ESDHC_HOST_CONTROL_RES 0x01
> >> > > +
> >> > > +/* System Control Register */
> >> > > +#define ESDHC_SYSTEM_CONTROL 0x2c
> >> > > +#define ESDHC_CLOCK_MASK 0x0000fff0
> >> > > +#define ESDHC_PREDIV_SHIFT 8
> >> > > +#define ESDHC_DIVIDER_SHIFT 4
> >> > > +#define ESDHC_CLOCK_PEREN 0x00000004
> >> > > +#define ESDHC_CLOCK_HCKEN 0x00000002
> >> > > +#define ESDHC_CLOCK_IPGEN 0x00000001
> >> > > +
> >> > > +/* Control Register for DMA transfer */
> >> > > +#define ESDHC_DMA_SYSCTL 0x40c
> >> > > +#define ESDHC_DMA_SNOOP 0x00000040
> >> > >
> >> > > #endif /* _DRIVERS_MMC_SDHCI_ESDHC_H */
> >> > > --
> >> > > 2.1.0.27.g96db324
> >
^ permalink raw reply [flat|nested] 7+ messages in thread