Re: [PATCH V1 2/2] mmc:sdhci-pci-o2micro:Change implementation of setting corresponding PLL frequency according to card mode

[Adrian Hunter <adrian.hunter@intel.com>]

On 03/12/2021 05:57, fred wrote:
> 1.SDR104 card mode PLL frequency is 0x2c28.
> 2.SD2.0/SDR50 card mode PLL frequency is 0X2510.

As before, this commit message is a bit brief.  Can you explain a bit more,
to explain things like:
Why?  Is this a fix?  What difference does an end-user see?

If it is a fix, can you add a Fixes: tag.

Subject line should have a space after each ':'

> 
> Signed-off-by: fred<fred.ai@bayhubtech.com>

Add a space between fred and <fred.ai@bayhubtech.com>

> 
> change in v1:
> When SD2.0/SDR50 card mode,driver need to set PLL frequency 0x2510.
> ---
>  drivers/mmc/host/sdhci-pci-o2micro.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/mmc/host/sdhci-pci-o2micro.c b/drivers/mmc/host/sdhci-pci-o2micro.c
> index bac3f0f8185b..32a8ef874efa 100644
> --- a/drivers/mmc/host/sdhci-pci-o2micro.c
> +++ b/drivers/mmc/host/sdhci-pci-o2micro.c
> @@ -568,9 +568,17 @@ static void sdhci_pci_o2_set_clock(struct sdhci_host *host, unsigned int clock)
>  	if ((host->timing == MMC_TIMING_UHS_SDR104) && (clock == 200000000)) {
>  		pci_read_config_dword(chip->pdev, O2_SD_PLL_SETTING, &scratch_32);
>  
> +		/*SDR104 card mode PLL frequency value is 0x2c28*/

For this and other comments, please put a space after '/*' and before '*/'

>  		if ((scratch_32 & 0xFFFF0000) != 0x2c280000)
>  			o2_pci_set_baseclk(chip, 0x2c280000);
>  
> +	} else {

Should this 'else' be in the previous patch instead?

> +		pci_read_config_dword(chip->pdev, O2_SD_PLL_SETTING, &scratch_32);
> +
> +		/*SD2.0,SDR50 card mode PLL DMDN value is 0X2510*/
> +		if ((scratch_32 & 0xFFFF0000) != 0x2510000)
> +			o2_pci_set_baseclk(chip, 0x25100000);
> +
>  		/*If not SDR104 card mode, set 0x354 value 0*/
>  		pci_read_config_dword(chip->pdev, O2_SD_OUTPUT_CLK_SOURCE_SWITCH, &scratch_32);
>  		scratch_32 &= ~(1 << 16);
>