RE: [PATCH] mmc-utils: Add basic erase error check

["Christian Löhle" <CLoehle@hyperstone.com>]

-----Original Message-----
From: Avri Altman <Avri.Altman@wdc.com> 
Sent: Montag, 12. Dezember 2022 14:45
To: Christian Löhle <CLoehle@hyperstone.com>; ulf.hansson@linaro.org; adrian.hunter@intel.com; linux-mmc@vger.kernel.org
Subject: RE: [PATCH] mmc-utils: Add basic erase error check

>> Check for erase specific R1 errors so e.g. an OOR erase is not 
>> reported as successful when it never executed.
>> 
>> There could be checks for more error bits but R1_ERASE_SEQ_ERROR on 
>> CMD38 should catch all that are reported by hardware anyway.
>> 
>> Signed-off-by: Christian Loehle <cloehle@hyperstone.com>
>> ---
>>  mmc_cmds.c | 18 ++++++++++++++++++
>>  1 file changed, 18 insertions(+)
>> 
>> diff --git a/mmc_cmds.c b/mmc_cmds.c
>> index e6d3273..c00fe5e 100644
>> --- a/mmc_cmds.c
>> +++ b/mmc_cmds.c
>> @@ -54,6 +54,7 @@
>>  #define WPTYPE_PWRON 2
>>  #define WPTYPE_PERM 3
>> 
>> +#define ERASE_R1_ERR_MASK (R1_ERASE_SEQ_ERROR | R1_ERASE_PARAM |
>> R1_ERASE_RESET)
>> 
>>  int read_extcsd(int fd, __u8 *ext_csd)  { @@ -2668,6 +2669,23 @@ 
>> static int erase(int dev_fd, __u32 argin, __u32 start,
>> __u32 end)
>>         if (ret)
>>                 perror("Erase multi-cmd ioctl");
>> 
>> +       /* Does not work for SPI cards */
>> +       if (multi_cmd->cmds[0].response[0] & ERASE_R1_ERR_MASK) {
>> +               fprintf(stderr, "Erase start response: %08x\n",
>> +                               multi_cmd->cmds[0].response[0]);
>> +               ret = -EIO;
>> +       }
>> +       if (multi_cmd->cmds[1].response[0] & ERASE_R1_ERR_MASK) {
>> +               fprintf(stderr, "Erase end response: %08x\n",
>> +                               multi_cmd->cmds[1].response[0]);
>> +               ret = -EIO;
>> +       }
>> +       if (multi_cmd->cmds[2].response[0] & ERASE_R1_ERR_MASK) {
>> +               fprintf(stderr, "Erase response: %08x\n",
>> +                               multi_cmd->cmds[2].response[0]);
>> +               ret = -EIO;
>> +       }
>> +
> AFAIK the device will not set those bits in the command responses, but those are only available to read in the status register.
> Let me check.
>
> Thanks,
> Avri

So any R1 response which all of the three are? Or am I misunderstanding you?

Anyway the (eMMC) spec reads:
"If an erase command (either CMD35, CMD36, CMD38) is received out of the defined erase sequence, the Device shall set the ERASE_SEQ_ERROR bit in the status register and reset the whole sequence. If the host provides an out of range address as an argument to CMD35 or CMD36, the Device will reject the command, respond with the ADDRESS_OUT_OF_RANGE bit set and reset the whole erase sequence."
And for the cards that I've tried this holds true.
For SD a CMD13 after CMD38 is required, too.
I guess I can add that.

Regards,
Christian

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