* [PATCH 3/3] sdhci: Add Moorestown devices
2010-10-04 14:06 [PATCH 0/3] Initial Intel MID support for SDHCI Alan Cox
@ 2010-10-04 14:07 ` Alan Cox
0 siblings, 0 replies; 6+ messages in thread
From: Alan Cox @ 2010-10-04 14:07 UTC (permalink / raw)
To: linux-mmc
This adds the basic identifiers. Due to the various chip quirks it's not
enough to make MRST support very useful for earlier steppings but that can
follow.
(I'm currently trying to verify which steps actually matter outside Intel
so I can avoid unneeded stuff going upstream)
[Extracted from original development]
Signed-off-by: JiebingLi <jiebing.li@intel.com>
[Folds in fixes]
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
---
drivers/mmc/host/sdhci-pci.c | 41 +++++++++++++++++++++++++++++++++++++++++
1 files changed, 41 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c
index ec4b81d..789dbff 100644
--- a/drivers/mmc/host/sdhci-pci.c
+++ b/drivers/mmc/host/sdhci-pci.c
@@ -145,6 +145,31 @@ static const struct sdhci_pci_fixes sdhci_cafe = {
SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
};
+/*
+ * ADMA operation is disabled for Moorestown platform due to
+ * hardware bugs.
+ */
+static int mrst_hc1_probe(struct sdhci_pci_chip *chip)
+{
+ /*
+ * slots number is fixed here for MRST as SDIO3 is never used and has
+ * hardware bugs.
+ */
+ chip->num_slots = 1;
+ return 0;
+}
+
+static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = {
+ .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
+ .host_ops = &sdhci_intel_mrst_hc,
+};
+
+static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1 = {
+ .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
+ .host_ops = &sdhci_intel_mrst_hc,
+ .probe = mrst_hc1_probe,
+};
+
static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
.quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
};
@@ -504,6 +529,22 @@ static const struct pci_device_id pci_ids[] __devinitdata = {
{
.vendor = PCI_VENDOR_ID_INTEL,
+ .device = PCI_DEVICE_ID_INTEL_MRST_SD0,
+ .subvendor = PCI_ANY_ID,
+ .subdevice = PCI_ANY_ID,
+ .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc0,
+ },
+
+ {
+ .vendor = PCI_VENDOR_ID_INTEL,
+ .device = PCI_DEVICE_ID_INTEL_MRST_SD1,
+ .subvendor = PCI_ANY_ID,
+ .subdevice = PCI_ANY_ID,
+ .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1,
+ },
+
+ {
+ .vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_MFD_SD,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 0/3] Enabling patches for Intel MID SDHCI
@ 2010-10-04 14:23 Alan Cox
2010-10-04 14:24 ` [PATCH 1/3] sdhci: Allow the probe handler to override slots Alan Cox
` (3 more replies)
0 siblings, 4 replies; 6+ messages in thread
From: Alan Cox @ 2010-10-04 14:23 UTC (permalink / raw)
To: linux-mmc
Try again...
This adds basic support for the Intel MID platform devices. It doesn't include
the callback stuff to handle some of the errata but I'm trying to verify
which if any of those make sense outside of Intel before resubmitting that
bit.
---
Alan Cox (2):
sdhci: Add Moorestown devices
sdhci: Allow the probe handler to override slots
Xiaochen Shen (1):
sdhci: Intel Medfield support
drivers/mmc/host/sdhci-pci.c | 89 ++++++++++++++++++++++++++++++++++++++++++
include/linux/pci_ids.h | 7 +++
2 files changed, 96 insertions(+), 0 deletions(-)
--
Please mind the gap. Care for it and look after its needs
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 1/3] sdhci: Allow the probe handler to override slots
2010-10-04 14:23 [PATCH 0/3] Enabling patches for Intel MID SDHCI Alan Cox
@ 2010-10-04 14:24 ` Alan Cox
2010-10-04 14:24 ` [PATCH 2/3] sdhci: Intel Medfield support Alan Cox
` (2 subsequent siblings)
3 siblings, 0 replies; 6+ messages in thread
From: Alan Cox @ 2010-10-04 14:24 UTC (permalink / raw)
To: linux-mmc
From: Alan Cox <alan@linux.intel.com>
Currently we write it to the chip data, but if the probe handler overrides
it we ignore the new value and keep using our cached one. Fix this so that
a probe handler can adjust the slot count
Signed-off-by: Alan Cox <alan@linux.intel.com>
---
drivers/mmc/host/sdhci-pci.c | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c
index e8aa99d..4f5d6d0 100644
--- a/drivers/mmc/host/sdhci-pci.c
+++ b/drivers/mmc/host/sdhci-pci.c
@@ -818,6 +818,8 @@ static int __devinit sdhci_pci_probe(struct pci_dev *pdev,
goto free;
}
+ slots = chip->num_slots; /* Quirk may have changed this */
+
for (i = 0;i < slots;i++) {
slot = sdhci_pci_probe_slot(pdev, chip, first_bar + i);
if (IS_ERR(slot)) {
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 2/3] sdhci: Intel Medfield support
2010-10-04 14:23 [PATCH 0/3] Enabling patches for Intel MID SDHCI Alan Cox
2010-10-04 14:24 ` [PATCH 1/3] sdhci: Allow the probe handler to override slots Alan Cox
@ 2010-10-04 14:24 ` Alan Cox
2010-10-04 14:25 ` [PATCH 3/3] sdhci: Add Moorestown devices Alan Cox
2010-10-07 18:07 ` [PATCH 0/3] Enabling patches for Intel MID SDHCI Chris Ball
3 siblings, 0 replies; 6+ messages in thread
From: Alan Cox @ 2010-10-04 14:24 UTC (permalink / raw)
To: linux-mmc
From: Xiaochen Shen <xiaochen.shen@intel.com>
Basic support for the Intel Medfield devices
Give them their own quirks as we will need to update this later.
Signed-off-by: Xiaochen Shen <xiaochen.shen@intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
---
drivers/mmc/host/sdhci-pci.c | 48 ++++++++++++++++++++++++++++++++++++++++++
include/linux/pci_ids.h | 7 ++++++
2 files changed, 55 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c
index 4f5d6d0..ec4b81d 100644
--- a/drivers/mmc/host/sdhci-pci.c
+++ b/drivers/mmc/host/sdhci-pci.c
@@ -145,6 +145,14 @@ static const struct sdhci_pci_fixes sdhci_cafe = {
SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
};
+static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
+ .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
+};
+
+static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc_sdio = {
+ .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
+};
+
static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
{
u8 scratch;
@@ -494,6 +502,46 @@ static const struct pci_device_id pci_ids[] __devinitdata = {
.driver_data = (kernel_ulong_t)&sdhci_via,
},
+ {
+ .vendor = PCI_VENDOR_ID_INTEL,
+ .device = PCI_DEVICE_ID_INTEL_MFD_SD,
+ .subvendor = PCI_ANY_ID,
+ .subdevice = PCI_ANY_ID,
+ .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sd,
+ },
+
+ {
+ .vendor = PCI_VENDOR_ID_INTEL,
+ .device = PCI_DEVICE_ID_INTEL_MFD_SDIO1,
+ .subvendor = PCI_ANY_ID,
+ .subdevice = PCI_ANY_ID,
+ .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc_sdio,
+ },
+
+ {
+ .vendor = PCI_VENDOR_ID_INTEL,
+ .device = PCI_DEVICE_ID_INTEL_MFD_SDIO2,
+ .subvendor = PCI_ANY_ID,
+ .subdevice = PCI_ANY_ID,
+ .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc_sdio,
+ },
+
+ {
+ .vendor = PCI_VENDOR_ID_INTEL,
+ .device = PCI_DEVICE_ID_INTEL_MFD_EMMC0,
+ .subvendor = PCI_ANY_ID,
+ .subdevice = PCI_ANY_ID,
+ .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc_sdio,
+ },
+
+ {
+ .vendor = PCI_VENDOR_ID_INTEL,
+ .device = PCI_DEVICE_ID_INTEL_MFD_EMMC1,
+ .subvendor = PCI_ANY_ID,
+ .subdevice = PCI_ANY_ID,
+ .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc_sdio,
+ },
+
{ /* Generic SD host controller */
PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
},
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index acd38ac..bd33a06 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2424,6 +2424,13 @@
#define PCI_DEVICE_ID_INTEL_82375 0x0482
#define PCI_DEVICE_ID_INTEL_82424 0x0483
#define PCI_DEVICE_ID_INTEL_82378 0x0484
+#define PCI_DEVICE_ID_INTEL_MRST_SD0 0x0807
+#define PCI_DEVICE_ID_INTEL_MRST_SD1 0x0808
+#define PCI_DEVICE_ID_INTEL_MFD_SD 0x0820
+#define PCI_DEVICE_ID_INTEL_MFD_SDIO1 0x0821
+#define PCI_DEVICE_ID_INTEL_MFD_SDIO2 0x0822
+#define PCI_DEVICE_ID_INTEL_MFD_EMMC0 0x0823
+#define PCI_DEVICE_ID_INTEL_MFD_EMMC1 0x0824
#define PCI_DEVICE_ID_INTEL_I960 0x0960
#define PCI_DEVICE_ID_INTEL_I960RM 0x0962
#define PCI_DEVICE_ID_INTEL_8257X_SOL 0x1062
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH 3/3] sdhci: Add Moorestown devices
2010-10-04 14:23 [PATCH 0/3] Enabling patches for Intel MID SDHCI Alan Cox
2010-10-04 14:24 ` [PATCH 1/3] sdhci: Allow the probe handler to override slots Alan Cox
2010-10-04 14:24 ` [PATCH 2/3] sdhci: Intel Medfield support Alan Cox
@ 2010-10-04 14:25 ` Alan Cox
2010-10-07 18:07 ` [PATCH 0/3] Enabling patches for Intel MID SDHCI Chris Ball
3 siblings, 0 replies; 6+ messages in thread
From: Alan Cox @ 2010-10-04 14:25 UTC (permalink / raw)
To: linux-mmc
From: Alan Cox <alan@linux.intel.com>
This adds the basic identifiers. Due to the various chip quirks it's not
enough to make MRST support very useful for earlier steppings but that can
follow.
(I'm currently trying to verify which steps actually matter outside Intel
so I can avoid unneeded stuff going upstream)
[Extracted from original development]
Signed-off-by: JiebingLi <jiebing.li@intel.com>
[Folds in fixes]
Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
---
drivers/mmc/host/sdhci-pci.c | 39 +++++++++++++++++++++++++++++++++++++++
1 files changed, 39 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c
index ec4b81d..55746ba 100644
--- a/drivers/mmc/host/sdhci-pci.c
+++ b/drivers/mmc/host/sdhci-pci.c
@@ -145,6 +145,29 @@ static const struct sdhci_pci_fixes sdhci_cafe = {
SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
};
+/*
+ * ADMA operation is disabled for Moorestown platform due to
+ * hardware bugs.
+ */
+static int mrst_hc1_probe(struct sdhci_pci_chip *chip)
+{
+ /*
+ * slots number is fixed here for MRST as SDIO3 is never used and has
+ * hardware bugs.
+ */
+ chip->num_slots = 1;
+ return 0;
+}
+
+static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = {
+ .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
+};
+
+static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1 = {
+ .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
+ .probe = mrst_hc1_probe,
+};
+
static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
.quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
};
@@ -504,6 +527,22 @@ static const struct pci_device_id pci_ids[] __devinitdata = {
{
.vendor = PCI_VENDOR_ID_INTEL,
+ .device = PCI_DEVICE_ID_INTEL_MRST_SD0,
+ .subvendor = PCI_ANY_ID,
+ .subdevice = PCI_ANY_ID,
+ .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc0,
+ },
+
+ {
+ .vendor = PCI_VENDOR_ID_INTEL,
+ .device = PCI_DEVICE_ID_INTEL_MRST_SD1,
+ .subvendor = PCI_ANY_ID,
+ .subdevice = PCI_ANY_ID,
+ .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1,
+ },
+
+ {
+ .vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_MFD_SD,
.subvendor = PCI_ANY_ID,
.subdevice = PCI_ANY_ID,
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 0/3] Enabling patches for Intel MID SDHCI
2010-10-04 14:23 [PATCH 0/3] Enabling patches for Intel MID SDHCI Alan Cox
` (2 preceding siblings ...)
2010-10-04 14:25 ` [PATCH 3/3] sdhci: Add Moorestown devices Alan Cox
@ 2010-10-07 18:07 ` Chris Ball
3 siblings, 0 replies; 6+ messages in thread
From: Chris Ball @ 2010-10-07 18:07 UTC (permalink / raw)
To: Alan Cox; +Cc: linux-mmc
Hi Alan,
On Mon, Oct 04, 2010 at 03:23:55PM +0100, Alan Cox wrote:
> Try again...
>
> This adds basic support for the Intel MID platform devices. It doesn't include
> the callback stuff to handle some of the errata but I'm trying to verify
> which if any of those make sense outside of Intel before resubmitting that
> bit.
Thanks, applied to mmc-next / queued for 2.6.37.
- Chris.
--
Chris Ball <cjb@laptop.org> <http://printf.net/>
One Laptop Per Child
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2010-10-07 18:07 UTC | newest]
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2010-10-04 14:24 ` [PATCH 2/3] sdhci: Intel Medfield support Alan Cox
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