[PATCH 0/3] address S32G2/S32G3 SoC based boards particularities

[PATCH 0/3] address S32G2/S32G3 SoC based boards particularities

[Ciprian Costea]

This patchset addresses S32G2/S32G3 SoC based boards
uSDHC controller particularities such as:
- GPIO card detect wake mechanism is not available

It also fixes a clocking usage issue on 'clk_get_rate',
in case of 'per' clock.

Changes in v2:
 - Dropped option to not change pinctrl during PM.
Instead, when S32G2/S32G3 uSDHC pinctrl entries will be
upstream'ed, 'sleep' pinctrl will not be defined.

Ciprian Costea (3):
  mmc: sdhci-esdhc-imx: disable card detect wake for S32G based
    platforms
  mmc: sdhci-esdhc-imx: obtain the 'per' clock rate after its enablement
  MAINTAINERS: add 's32@nxp.com' as relevant mailing list for
    'sdhci-esdhc-imx' driver

 MAINTAINERS                        |  1 +
 drivers/mmc/host/sdhci-esdhc-imx.c | 16 +++++++++++++---
 2 files changed, 14 insertions(+), 3 deletions(-)

-- 
2.45.2

[PATCH 1/3] mmc: sdhci-esdhc-imx: disable card detect wake for S32G based platforms

[Ciprian Costea]

In case of S32G based platforms, GPIO CD used for card detect
wake mechanism is not available.

For this scenario the newly introduced flag
'ESDHC_FLAG_SKIP_CD_WAKE' is used.

Signed-off-by: Ciprian Costea <ciprianmarian.costea@oss.nxp.com>
---
 drivers/mmc/host/sdhci-esdhc-imx.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index 40a6e2f8145a..21d984a77be8 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -201,6 +201,9 @@
 /* ERR004536 is not applicable for the IP  */
 #define ESDHC_FLAG_SKIP_ERR004536	BIT(17)
 
+/* The IP does not have GPIO CD wake capabilities */
+#define ESDHC_FLAG_SKIP_CD_WAKE		BIT(18)
+
 enum wp_types {
 	ESDHC_WP_NONE,		/* no WP, neither controller nor gpio */
 	ESDHC_WP_CONTROLLER,	/* mmc controller internal WP */
@@ -298,7 +301,7 @@ static struct esdhc_soc_data usdhc_s32g2_data = {
 	.flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_MAN_TUNING
 			| ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200
 			| ESDHC_FLAG_HS400 | ESDHC_FLAG_HS400_ES
-			| ESDHC_FLAG_SKIP_ERR004536,
+			| ESDHC_FLAG_SKIP_ERR004536 | ESDHC_FLAG_SKIP_CD_WAKE,
 };
 
 static struct esdhc_soc_data usdhc_imx7ulp_data = {
@@ -1726,7 +1729,8 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
 		host->mmc->caps |= MMC_CAP_1_8V_DDR | MMC_CAP_3_3V_DDR;
 
 		/* GPIO CD can be set as a wakeup source */
-		host->mmc->caps |= MMC_CAP_CD_WAKE;
+		if (!(imx_data->socdata->flags & ESDHC_FLAG_SKIP_CD_WAKE))
+			host->mmc->caps |= MMC_CAP_CD_WAKE;
 
 		if (!(imx_data->socdata->flags & ESDHC_FLAG_HS200))
 			host->quirks2 |= SDHCI_QUIRK2_BROKEN_HS200;
-- 
2.45.2

[PATCH 2/3] mmc: sdhci-esdhc-imx: obtain the 'per' clock rate after its enablement

[Ciprian Costea]

The I.MX SDHCI driver assumes that the frequency of the 'per' clock
can be obtained even on disabled clocks, which is not always the case.

According to 'clk_get_rate' documentation, it is only valid
once the clock source has been enabled.

Signed-off-by: Ciprian Costea <ciprianmarian.costea@oss.nxp.com>
---
 drivers/mmc/host/sdhci-esdhc-imx.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
index 21d984a77be8..8f0bc6dca2b0 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -1709,7 +1709,6 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
 	}
 
 	pltfm_host->clk = imx_data->clk_per;
-	pltfm_host->clock = clk_get_rate(pltfm_host->clk);
 	err = clk_prepare_enable(imx_data->clk_per);
 	if (err)
 		goto free_sdhci;
@@ -1720,6 +1719,13 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
 	if (err)
 		goto disable_ipg_clk;
 
+	pltfm_host->clock = clk_get_rate(pltfm_host->clk);
+	if (!pltfm_host->clock) {
+		dev_err(mmc_dev(host->mmc), "could not get clk rate\n");
+		err = -EINVAL;
+		goto disable_ahb_clk;
+	}
+
 	imx_data->pinctrl = devm_pinctrl_get(&pdev->dev);
 	if (IS_ERR(imx_data->pinctrl))
 		dev_warn(mmc_dev(host->mmc), "could not get pinctrl\n");
-- 
2.45.2

[PATCH 3/3] MAINTAINERS: add 's32@nxp.com' as relevant mailing list for 'sdhci-esdhc-imx' driver

[Ciprian Costea]

Since NXP S32G2 and S32G3 SoCs share the SDHCI controller with
I.MX platforms it would be valuable to add 's32@nxp.com' as a
relevant mailing list in this area.

Signed-off-by: Ciprian Costea <ciprianmarian.costea@oss.nxp.com>
---
 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index a39c237edb95..26b1ec2ba094 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -20098,6 +20098,7 @@ SECURE DIGITAL HOST CONTROLLER INTERFACE (SDHCI) NXP i.MX DRIVER
 M:	Haibo Chen <haibo.chen@nxp.com>
 L:	imx@lists.linux.dev
 L:	linux-mmc@vger.kernel.org
+L:	s32@nxp.com
 S:	Maintained
 F:	drivers/mmc/host/sdhci-esdhc-imx.c
 
-- 
2.45.2

Re: [PATCH 2/3] mmc: sdhci-esdhc-imx: obtain the 'per' clock rate after its enablement

[Adrian Hunter]

On 8/07/24 15:10, Ciprian Costea wrote:
> The I.MX SDHCI driver assumes that the frequency of the 'per' clock
> can be obtained even on disabled clocks, which is not always the case.
> 
> According to 'clk_get_rate' documentation, it is only valid
> once the clock source has been enabled.

The kerneldoc comment for clk_get_rate() says

	Can be called regardless of the clock enabledness

which sounds like the opposite.  Please clarify.

> 
> Signed-off-by: Ciprian Costea <ciprianmarian.costea@oss.nxp.com>
> ---
>  drivers/mmc/host/sdhci-esdhc-imx.c | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
> index 21d984a77be8..8f0bc6dca2b0 100644
> --- a/drivers/mmc/host/sdhci-esdhc-imx.c
> +++ b/drivers/mmc/host/sdhci-esdhc-imx.c
> @@ -1709,7 +1709,6 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
>  	}
>  
>  	pltfm_host->clk = imx_data->clk_per;
> -	pltfm_host->clock = clk_get_rate(pltfm_host->clk);
>  	err = clk_prepare_enable(imx_data->clk_per);
>  	if (err)
>  		goto free_sdhci;
> @@ -1720,6 +1719,13 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
>  	if (err)
>  		goto disable_ipg_clk;
>  
> +	pltfm_host->clock = clk_get_rate(pltfm_host->clk);
> +	if (!pltfm_host->clock) {
> +		dev_err(mmc_dev(host->mmc), "could not get clk rate\n");
> +		err = -EINVAL;
> +		goto disable_ahb_clk;
> +	}
> +
>  	imx_data->pinctrl = devm_pinctrl_get(&pdev->dev);
>  	if (IS_ERR(imx_data->pinctrl))
>  		dev_warn(mmc_dev(host->mmc), "could not get pinctrl\n");

Re: [PATCH 1/3] mmc: sdhci-esdhc-imx: disable card detect wake for S32G based platforms

[Adrian Hunter]

On 8/07/24 15:10, Ciprian Costea wrote:
> In case of S32G based platforms, GPIO CD used for card detect
> wake mechanism is not available.
> 
> For this scenario the newly introduced flag
> 'ESDHC_FLAG_SKIP_CD_WAKE' is used.
> 
> Signed-off-by: Ciprian Costea <ciprianmarian.costea@oss.nxp.com>

Should have:

 - put the patch set version number (v2) in the subject e.g.
   [PATCH v2 1/3] mmc: sdhci-esdhc-imx: disable card detect wake for S32G based platforms

 - added Haibo Chen's Reviewed-by tag

Anyway:

Acked-by: Adrian Hunter <adrian.hunter@intel.com>


> ---
>  drivers/mmc/host/sdhci-esdhc-imx.c | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
> index 40a6e2f8145a..21d984a77be8 100644
> --- a/drivers/mmc/host/sdhci-esdhc-imx.c
> +++ b/drivers/mmc/host/sdhci-esdhc-imx.c
> @@ -201,6 +201,9 @@
>  /* ERR004536 is not applicable for the IP  */
>  #define ESDHC_FLAG_SKIP_ERR004536	BIT(17)
>  
> +/* The IP does not have GPIO CD wake capabilities */
> +#define ESDHC_FLAG_SKIP_CD_WAKE		BIT(18)
> +
>  enum wp_types {
>  	ESDHC_WP_NONE,		/* no WP, neither controller nor gpio */
>  	ESDHC_WP_CONTROLLER,	/* mmc controller internal WP */
> @@ -298,7 +301,7 @@ static struct esdhc_soc_data usdhc_s32g2_data = {
>  	.flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_MAN_TUNING
>  			| ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200
>  			| ESDHC_FLAG_HS400 | ESDHC_FLAG_HS400_ES
> -			| ESDHC_FLAG_SKIP_ERR004536,
> +			| ESDHC_FLAG_SKIP_ERR004536 | ESDHC_FLAG_SKIP_CD_WAKE,
>  };
>  
>  static struct esdhc_soc_data usdhc_imx7ulp_data = {
> @@ -1726,7 +1729,8 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
>  		host->mmc->caps |= MMC_CAP_1_8V_DDR | MMC_CAP_3_3V_DDR;
>  
>  		/* GPIO CD can be set as a wakeup source */
> -		host->mmc->caps |= MMC_CAP_CD_WAKE;
> +		if (!(imx_data->socdata->flags & ESDHC_FLAG_SKIP_CD_WAKE))
> +			host->mmc->caps |= MMC_CAP_CD_WAKE;
>  
>  		if (!(imx_data->socdata->flags & ESDHC_FLAG_HS200))
>  			host->quirks2 |= SDHCI_QUIRK2_BROKEN_HS200;

Re: [PATCH 2/3] mmc: sdhci-esdhc-imx: obtain the 'per' clock rate after its enablement

[Ciprian Marian Costea]

On 7/10/2024 3:33 PM, Adrian Hunter wrote:
> On 8/07/24 15:10, Ciprian Costea wrote:
>> The I.MX SDHCI driver assumes that the frequency of the 'per' clock
>> can be obtained even on disabled clocks, which is not always the case.
>>
>> According to 'clk_get_rate' documentation, it is only valid
>> once the clock source has been enabled.
> 
> The kerneldoc comment for clk_get_rate() says
> 
> 	Can be called regardless of the clock enabledness
> 
> which sounds like the opposite.  Please clarify.
>

Hello Adrian,

My observation was based on the following [1] 'clk_get_rate()' 
documentation.

[1] 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/linux/clk.h#n720

Best Regards,
Ciprian

>>
>> Signed-off-by: Ciprian Costea <ciprianmarian.costea@oss.nxp.com>
>> ---
>>   drivers/mmc/host/sdhci-esdhc-imx.c | 8 +++++++-
>>   1 file changed, 7 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
>> index 21d984a77be8..8f0bc6dca2b0 100644
>> --- a/drivers/mmc/host/sdhci-esdhc-imx.c
>> +++ b/drivers/mmc/host/sdhci-esdhc-imx.c
>> @@ -1709,7 +1709,6 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
>>   	}
>>   
>>   	pltfm_host->clk = imx_data->clk_per;
>> -	pltfm_host->clock = clk_get_rate(pltfm_host->clk);
>>   	err = clk_prepare_enable(imx_data->clk_per);
>>   	if (err)
>>   		goto free_sdhci;
>> @@ -1720,6 +1719,13 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
>>   	if (err)
>>   		goto disable_ipg_clk;
>>   
>> +	pltfm_host->clock = clk_get_rate(pltfm_host->clk);
>> +	if (!pltfm_host->clock) {
>> +		dev_err(mmc_dev(host->mmc), "could not get clk rate\n");
>> +		err = -EINVAL;
>> +		goto disable_ahb_clk;
>> +	}
>> +
>>   	imx_data->pinctrl = devm_pinctrl_get(&pdev->dev);
>>   	if (IS_ERR(imx_data->pinctrl))
>>   		dev_warn(mmc_dev(host->mmc), "could not get pinctrl\n");
> 

Re: [PATCH 2/3] mmc: sdhci-esdhc-imx: obtain the 'per' clock rate after its enablement

[Adrian Hunter]

On 10/07/24 15:50, Ciprian Marian Costea wrote:
> On 7/10/2024 3:33 PM, Adrian Hunter wrote:
>> On 8/07/24 15:10, Ciprian Costea wrote:
>>> The I.MX SDHCI driver assumes that the frequency of the 'per' clock
>>> can be obtained even on disabled clocks, which is not always the case.
>>>
>>> According to 'clk_get_rate' documentation, it is only valid
>>> once the clock source has been enabled.
>>
>> The kerneldoc comment for clk_get_rate() says
>>
>>     Can be called regardless of the clock enabledness
>>
>> which sounds like the opposite.  Please clarify.
>>
> 
> Hello Adrian,
> 
> My observation was based on the following [1] 'clk_get_rate()' documentation.
> 
> [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/linux/clk.h#n720
> 
> Best Regards,
> Ciprian

Yes, that is clear.

Acked-by: Adrian Hunter <adrian.hunter@intel.com>

> 
>>>
>>> Signed-off-by: Ciprian Costea <ciprianmarian.costea@oss.nxp.com>
>>> ---
>>>   drivers/mmc/host/sdhci-esdhc-imx.c | 8 +++++++-
>>>   1 file changed, 7 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
>>> index 21d984a77be8..8f0bc6dca2b0 100644
>>> --- a/drivers/mmc/host/sdhci-esdhc-imx.c
>>> +++ b/drivers/mmc/host/sdhci-esdhc-imx.c
>>> @@ -1709,7 +1709,6 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
>>>       }
>>>         pltfm_host->clk = imx_data->clk_per;
>>> -    pltfm_host->clock = clk_get_rate(pltfm_host->clk);
>>>       err = clk_prepare_enable(imx_data->clk_per);
>>>       if (err)
>>>           goto free_sdhci;
>>> @@ -1720,6 +1719,13 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
>>>       if (err)
>>>           goto disable_ipg_clk;
>>>   +    pltfm_host->clock = clk_get_rate(pltfm_host->clk);
>>> +    if (!pltfm_host->clock) {
>>> +        dev_err(mmc_dev(host->mmc), "could not get clk rate\n");
>>> +        err = -EINVAL;
>>> +        goto disable_ahb_clk;
>>> +    }
>>> +
>>>       imx_data->pinctrl = devm_pinctrl_get(&pdev->dev);
>>>       if (IS_ERR(imx_data->pinctrl))
>>>           dev_warn(mmc_dev(host->mmc), "could not get pinctrl\n");
>>
> 

Re: [PATCH 3/3] MAINTAINERS: add 's32@nxp.com' as relevant mailing list for 'sdhci-esdhc-imx' driver

[Adrian Hunter]

On 8/07/24 15:10, Ciprian Costea wrote:
> Since NXP S32G2 and S32G3 SoCs share the SDHCI controller with
> I.MX platforms it would be valuable to add 's32@nxp.com' as a
> relevant mailing list in this area.
> 
> Signed-off-by: Ciprian Costea <ciprianmarian.costea@oss.nxp.com>
> ---
>  MAINTAINERS | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index a39c237edb95..26b1ec2ba094 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -20098,6 +20098,7 @@ SECURE DIGITAL HOST CONTROLLER INTERFACE (SDHCI) NXP i.MX DRIVER
>  M:	Haibo Chen <haibo.chen@nxp.com>
>  L:	imx@lists.linux.dev
>  L:	linux-mmc@vger.kernel.org
> +L:	s32@nxp.com
>  S:	Maintained
>  F:	drivers/mmc/host/sdhci-esdhc-imx.c
>  

Assuming Haibo has no objections:

Acked-by: Adrian Hunter <adrian.hunter@intel.com>

Re: [PATCH 1/3] mmc: sdhci-esdhc-imx: disable card detect wake for S32G based platforms

[Ciprian Marian Costea]

On 7/10/2024 3:34 PM, Adrian Hunter wrote:
> On 8/07/24 15:10, Ciprian Costea wrote:
>> In case of S32G based platforms, GPIO CD used for card detect
>> wake mechanism is not available.
>>
>> For this scenario the newly introduced flag
>> 'ESDHC_FLAG_SKIP_CD_WAKE' is used.
>>
>> Signed-off-by: Ciprian Costea <ciprianmarian.costea@oss.nxp.com>
> 
> Should have:
> 
>   - put the patch set version number (v2) in the subject e.g.
>     [PATCH v2 1/3] mmc: sdhci-esdhc-imx: disable card detect wake for S32G based platforms
> 
>   - added Haibo Chen's Reviewed-by tag
> 
> Anyway:
> 
> Acked-by: Adrian Hunter <adrian.hunter@intel.com>
>

Hello Adrian,

Sorry for bothering you with this question, but should I send a new 
patchset adding the new version or what is the process after this step ? 
For example, should I send this patchset again with V3 adding all the 
ACKs & Reviewed-by tags to each commit from the patchset ?

Best Regards,
Ciprian

> 
>> ---
>>   drivers/mmc/host/sdhci-esdhc-imx.c | 8 ++++++--
>>   1 file changed, 6 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
>> index 40a6e2f8145a..21d984a77be8 100644
>> --- a/drivers/mmc/host/sdhci-esdhc-imx.c
>> +++ b/drivers/mmc/host/sdhci-esdhc-imx.c
>> @@ -201,6 +201,9 @@
>>   /* ERR004536 is not applicable for the IP  */
>>   #define ESDHC_FLAG_SKIP_ERR004536	BIT(17)
>>   
>> +/* The IP does not have GPIO CD wake capabilities */
>> +#define ESDHC_FLAG_SKIP_CD_WAKE		BIT(18)
>> +
>>   enum wp_types {
>>   	ESDHC_WP_NONE,		/* no WP, neither controller nor gpio */
>>   	ESDHC_WP_CONTROLLER,	/* mmc controller internal WP */
>> @@ -298,7 +301,7 @@ static struct esdhc_soc_data usdhc_s32g2_data = {
>>   	.flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_MAN_TUNING
>>   			| ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200
>>   			| ESDHC_FLAG_HS400 | ESDHC_FLAG_HS400_ES
>> -			| ESDHC_FLAG_SKIP_ERR004536,
>> +			| ESDHC_FLAG_SKIP_ERR004536 | ESDHC_FLAG_SKIP_CD_WAKE,
>>   };
>>   
>>   static struct esdhc_soc_data usdhc_imx7ulp_data = {
>> @@ -1726,7 +1729,8 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
>>   		host->mmc->caps |= MMC_CAP_1_8V_DDR | MMC_CAP_3_3V_DDR;
>>   
>>   		/* GPIO CD can be set as a wakeup source */
>> -		host->mmc->caps |= MMC_CAP_CD_WAKE;
>> +		if (!(imx_data->socdata->flags & ESDHC_FLAG_SKIP_CD_WAKE))
>> +			host->mmc->caps |= MMC_CAP_CD_WAKE;
>>   
>>   		if (!(imx_data->socdata->flags & ESDHC_FLAG_HS200))
>>   			host->quirks2 |= SDHCI_QUIRK2_BROKEN_HS200;
> 

Re: [PATCH 1/3] mmc: sdhci-esdhc-imx: disable card detect wake for S32G based platforms

[Ulf Hansson]

On Thu, 11 Jul 2024 at 16:26, Ciprian Marian Costea
<ciprianmarian.costea@oss.nxp.com> wrote:
>
> On 7/10/2024 3:34 PM, Adrian Hunter wrote:
> > On 8/07/24 15:10, Ciprian Costea wrote:
> >> In case of S32G based platforms, GPIO CD used for card detect
> >> wake mechanism is not available.
> >>
> >> For this scenario the newly introduced flag
> >> 'ESDHC_FLAG_SKIP_CD_WAKE' is used.
> >>
> >> Signed-off-by: Ciprian Costea <ciprianmarian.costea@oss.nxp.com>
> >
> > Should have:
> >
> >   - put the patch set version number (v2) in the subject e.g.
> >     [PATCH v2 1/3] mmc: sdhci-esdhc-imx: disable card detect wake for S32G based platforms
> >
> >   - added Haibo Chen's Reviewed-by tag
> >
> > Anyway:
> >
> > Acked-by: Adrian Hunter <adrian.hunter@intel.com>
> >
>
> Hello Adrian,
>
> Sorry for bothering you with this question, but should I send a new
> patchset adding the new version or what is the process after this step ?
> For example, should I send this patchset again with V3 adding all the
> ACKs & Reviewed-by tags to each commit from the patchset ?

No need to send a new version this time, I can add Haibo's tag when
applying. Although I prefer an ack from him for patch3 before I merge
this.

Kind regards
Uffe

>
> Best Regards,
> Ciprian
>
> >
> >> ---
> >>   drivers/mmc/host/sdhci-esdhc-imx.c | 8 ++++++--
> >>   1 file changed, 6 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c
> >> index 40a6e2f8145a..21d984a77be8 100644
> >> --- a/drivers/mmc/host/sdhci-esdhc-imx.c
> >> +++ b/drivers/mmc/host/sdhci-esdhc-imx.c
> >> @@ -201,6 +201,9 @@
> >>   /* ERR004536 is not applicable for the IP  */
> >>   #define ESDHC_FLAG_SKIP_ERR004536  BIT(17)
> >>
> >> +/* The IP does not have GPIO CD wake capabilities */
> >> +#define ESDHC_FLAG_SKIP_CD_WAKE             BIT(18)
> >> +
> >>   enum wp_types {
> >>      ESDHC_WP_NONE,          /* no WP, neither controller nor gpio */
> >>      ESDHC_WP_CONTROLLER,    /* mmc controller internal WP */
> >> @@ -298,7 +301,7 @@ static struct esdhc_soc_data usdhc_s32g2_data = {
> >>      .flags = ESDHC_FLAG_USDHC | ESDHC_FLAG_MAN_TUNING
> >>                      | ESDHC_FLAG_HAVE_CAP1 | ESDHC_FLAG_HS200
> >>                      | ESDHC_FLAG_HS400 | ESDHC_FLAG_HS400_ES
> >> -                    | ESDHC_FLAG_SKIP_ERR004536,
> >> +                    | ESDHC_FLAG_SKIP_ERR004536 | ESDHC_FLAG_SKIP_CD_WAKE,
> >>   };
> >>
> >>   static struct esdhc_soc_data usdhc_imx7ulp_data = {
> >> @@ -1726,7 +1729,8 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
> >>              host->mmc->caps |= MMC_CAP_1_8V_DDR | MMC_CAP_3_3V_DDR;
> >>
> >>              /* GPIO CD can be set as a wakeup source */
> >> -            host->mmc->caps |= MMC_CAP_CD_WAKE;
> >> +            if (!(imx_data->socdata->flags & ESDHC_FLAG_SKIP_CD_WAKE))
> >> +                    host->mmc->caps |= MMC_CAP_CD_WAKE;
> >>
> >>              if (!(imx_data->socdata->flags & ESDHC_FLAG_HS200))
> >>                      host->quirks2 |= SDHCI_QUIRK2_BROKEN_HS200;
> >
>

RE: [PATCH 3/3] MAINTAINERS: add 's32@nxp.com' as relevant mailing list for 'sdhci-esdhc-imx' driver

[Bough Chen]

> -----Original Message-----
> From: Ciprian Marian Costea (OSS) <ciprianmarian.costea@oss.nxp.com>
> Sent: 2024年7月8日 20:10
> To: Bough Chen <haibo.chen@nxp.com>; Adrian Hunter
> <adrian.hunter@intel.com>; Ulf Hansson <ulf.hansson@linaro.org>; Shawn Guo
> <shawnguo@kernel.org>; Sascha Hauer <s.hauer@pengutronix.de>;
> Pengutronix Kernel Team <kernel@pengutronix.de>; Fabio Estevam
> <festevam@gmail.com>
> Cc: linux-kernel@vger.kernel.org; linux-mmc@vger.kernel.org;
> imx@lists.linux.dev; linux-arm-kernel@lists.infradead.org; dl-S32
> <S32@nxp.com>; Ciprian Marian Costea (OSS)
> <ciprianmarian.costea@oss.nxp.com>
> Subject: [PATCH 3/3] MAINTAINERS: add 's32@nxp.com' as relevant mailing list
> for 'sdhci-esdhc-imx' driver
> 
> Since NXP S32G2 and S32G3 SoCs share the SDHCI controller with I.MX
> platforms it would be valuable to add 's32@nxp.com' as a relevant mailing list in
> this area.
> 

Acked-by: Haibo Chen <haibo.chen@nxp.com>

Regards
Haibo chen
> Signed-off-by: Ciprian Costea <ciprianmarian.costea@oss.nxp.com>
> ---
>  MAINTAINERS | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index a39c237edb95..26b1ec2ba094 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -20098,6 +20098,7 @@ SECURE DIGITAL HOST CONTROLLER INTERFACE
> (SDHCI) NXP i.MX DRIVER
>  M:	Haibo Chen <haibo.chen@nxp.com>
>  L:	imx@lists.linux.dev
>  L:	linux-mmc@vger.kernel.org
> +L:	s32@nxp.com
>  S:	Maintained
>  F:	drivers/mmc/host/sdhci-esdhc-imx.c
> 
> --
> 2.45.2

Re: [PATCH 0/3] address S32G2/S32G3 SoC based boards particularities

[Ulf Hansson]

On Mon, 8 Jul 2024 at 14:10, Ciprian Costea
<ciprianmarian.costea@oss.nxp.com> wrote:
>
> This patchset addresses S32G2/S32G3 SoC based boards
> uSDHC controller particularities such as:
> - GPIO card detect wake mechanism is not available
>
> It also fixes a clocking usage issue on 'clk_get_rate',
> in case of 'per' clock.
>
> Changes in v2:
>  - Dropped option to not change pinctrl during PM.
> Instead, when S32G2/S32G3 uSDHC pinctrl entries will be
> upstream'ed, 'sleep' pinctrl will not be defined.
>
> Ciprian Costea (3):
>   mmc: sdhci-esdhc-imx: disable card detect wake for S32G based
>     platforms
>   mmc: sdhci-esdhc-imx: obtain the 'per' clock rate after its enablement
>   MAINTAINERS: add 's32@nxp.com' as relevant mailing list for
>     'sdhci-esdhc-imx' driver
>
>  MAINTAINERS                        |  1 +
>  drivers/mmc/host/sdhci-esdhc-imx.c | 16 +++++++++++++---
>  2 files changed, 14 insertions(+), 3 deletions(-)
>

Applied for next, thanks!

Kind regards
Uffe