From: Shawn Lin <shawn.lin@rock-chips.com>
To: "Jyan Chou [周芷安]" <jyanchou@realtek.com>
Cc: shawn.lin@rock-chips.com, linux-mmc <linux-mmc@vger.kernel.org>,
"Jisheng.Zhang@synaptics.com" <Jisheng.Zhang@synaptics.com>,
Adrian Hunter <adrian.hunter@intel.com>
Subject: Re: Question about EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER
Date: Wed, 9 Nov 2022 11:45:44 +0800 [thread overview]
Message-ID: <82cfb880-4283-047b-c476-c23d06706b06@rock-chips.com> (raw)
In-Reply-To: <20fda8f718384317a8393baefc553d1b@realtek.com>
On 2022/11/8 17:19, Jyan Chou [周芷安] wrote:
>> CQHCI has its own DMA descriptors, so maybe a similar change is needed for CQHCI?
>
> I didn't find this limitation in synopsys DW IP databook.
>>> I found it on page 84
I see, but it wasn't clear to me if this description on P84 is for CQ
engine part as well. But seems yes after checking with the IP vendor.
So you do need a similar change for CQHCI in cqhci_host_alloc_tdl.
>
> -----Original Message-----
> From: Shawn Lin <shawn.lin@rock-chips.com>
> Sent: Tuesday, November 8, 2022 5:15 PM
> To: Adrian Hunter <adrian.hunter@intel.com>
> Cc: shawn.lin@rock-chips.com; linux-mmc <linux-mmc@vger.kernel.org>; Jyan Chou [周芷安] <jyanchou@realtek.com>; Jisheng.Zhang@synaptics.com
> Subject: Re: Question about EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER
>
> + Jisheng Zhang
>
> On 2022/11/8 16:34, Adrian Hunter wrote:
>> On 8/11/22 10:28, Shawn Lin wrote:
>>> On 2022/11/8 16:20, Adrian Hunter wrote:
>>>> On 8/11/22 09:25, Jyan Chou [周芷安] wrote:
>>>>> Hello Adrian Hunter,
>>>>>
>>>>> We are now using the upstream code of EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER, but we found that the existing driver cannot support the limitation of Synopsys IP.
>>>>>
>>>>> Synopsys IP has a description on their data book " While using DMA, the host memory data buffer size and start address must not exceed 128 MB".
>>>
>>> Synopsys-based SDHCI IP does have a limitation of 128MB boundary. But
>>> it has already been solved by upstream driver.
>>>
>>> FYI:
>>>
>>> commit b85c997d2cfefe7d1f706b85ae46e35a50e3131c ("mmc:
>>> sdhci-of-dwcmshc: solve 128MB DMA boundary limitation")
>>
>> CQHCI has its own DMA descriptors, so maybe a similar change is needed for CQHCI?
>
> I didn't find this limitation in synopsys DW IP databook.
>
>>
>>>
>>>>>
>>>>> I am wondering whether there is a method or patch that can fix this boundary limitation.
>>>>> Thanks.
>>>>> Best Regards,
>>>>> Jyan Chou
>>>>
>>>> Hello Jyan Chou
>>>>
>>>> I am not clear on what the exact limitation is. The driver never uses buffers as big as 128 MB.
>>>> To restrict DMA to low memory addresses a DMA mask can be used.
>>>>
>>>> But perhaps you mean not to cross a 128 MB boundary?
>>>>
>>>> Please cc your questions to the linux kernel mmc mailing list:
>>>> linux-mmc@vger.kernel.org because others can answer too.
>>>>
>>>> Regards
>>>> Adrian
>>
>
> ------Please consider the environment before printing this e-mail.
next prev parent reply other threads:[~2022-11-09 3:45 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <5842d536cb0d4086a225ea0fa2d42e72@realtek.com>
2022-11-08 8:20 ` Question about EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER Adrian Hunter
2022-11-08 8:28 ` Shawn Lin
2022-11-08 8:34 ` Adrian Hunter
2022-11-08 9:14 ` Shawn Lin
2022-11-08 9:19 ` Jyan Chou [周芷安]
2022-11-09 3:45 ` Shawn Lin [this message]
2022-11-10 2:11 ` Jyan Chou [周芷安]
2022-11-10 8:11 ` Adrian Hunter
2022-11-08 8:35 ` Jyan Chou [周芷安]
[not found] <6d989a63463b4d1e8c1f468754f4f424@realtek.com>
2023-06-20 6:46 ` Adrian Hunter
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