Re: Question about EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER

[Shawn Lin <shawn.lin@rock-chips.com>]

+ Jisheng Zhang

On 2022/11/8 16:34, Adrian Hunter wrote:
> On 8/11/22 10:28, Shawn Lin wrote:
>> On 2022/11/8 16:20, Adrian Hunter wrote:
>>> On 8/11/22 09:25, Jyan Chou [周芷安] wrote:
>>>> Hello Adrian Hunter,
>>>>
>>>> We are now using the upstream code of EMMC CMDQ HOST CONTROLLER INTERFACE (CQHCI) DRIVER, but we found that the existing driver cannot support the limitation of Synopsys IP.
>>>>
>>>> Synopsys IP has a description on their data book " While using DMA, the host memory data buffer size and start address must not exceed 128 MB".
>>
>> Synopsys-based SDHCI IP does have a limitation of 128MB boundary. But it
>> has already been solved by upstream driver.
>>
>> FYI:
>>
>> commit b85c997d2cfefe7d1f706b85ae46e35a50e3131c ("mmc: sdhci-of-dwcmshc: solve 128MB DMA boundary limitation")
> 
> CQHCI has its own DMA descriptors, so maybe a similar change is needed for CQHCI?

I didn't find this limitation in synopsys DW IP databook.

> 
>>
>>>>
>>>> I am wondering whether there is a method or patch that can fix this boundary limitation.
>>>> Thanks.
>>>> Best Regards,
>>>> Jyan Chou
>>>
>>> Hello Jyan Chou
>>>
>>> I am not clear on what the exact limitation is.  The driver never uses buffers as big as 128 MB.
>>> To restrict DMA to low memory addresses a DMA mask can be used.
>>>
>>> But perhaps you mean not to cross a 128 MB boundary?
>>>
>>> Please cc your questions to the linux kernel mmc mailing list: linux-mmc@vger.kernel.org because others
>>> can answer too.
>>>
>>> Regards
>>> Adrian
>