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* PROBLEM: mmc clock reduction error on NanoPi-R5S (rk3568)
@ 2026-07-20 19:56 Peter Taylor
  2026-07-22  2:54 ` Shawn Lin
  0 siblings, 1 reply; 2+ messages in thread
From: Peter Taylor @ 2026-07-20 19:56 UTC (permalink / raw)
  To: linux-mmc; +Cc: Adrian Hunter, Ulf Hansson, Shawn Lin

After the changes in 3009738a855c (Prevent illegal clock reduction in
HS200/HS400 mode), when trying to change the drive's partition table
using fdisk, it fails when I go to write. Here is the relevant dmesg output.
[ 19.509615] dwmmc_rockchip fe2b0000.mmc: IDMAC supports 32-bit address 
mode.
[ 19.510330] dwmmc_rockchip fe2b0000.mmc: Using internal DMA controller.
[ 19.511727] dwmmc_rockchip fe2b0000.mmc: Version ID is 270a
[ 19.512302] dwmmc_rockchip fe2b0000.mmc: DW MMC controller at irq 94,32 
bit host data width,256 deep fifo
[ 19.541960] mmc_host mmc1: Bus speed (slot 0) = 375000Hz (slot req 
400000Hz, actual 375000HZ div = 0)
[ 19.563121] mmc0: SDHCI controller on fe310000.mmc [fe310000.mmc] using 
ADMA
[ 19.602217] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 
50000000Hz, actual 50000000HZ div = 0)
[ 19.603277] mmc1: new high speed SDHC card at address 59b4
[ 19.647750] mmcblk1: mmc1:59b4 SMI 7.50 GiB
[ 19.652366] mmcblk1: p1
[ 19.655584] sdhci-dwcmshc fe310000.mmc: Can't reduce the clock below 
52MHz in HS200/HS400 mode
[ 19.656917] mmc0: new HS400 Enhanced strobe MMC card at address 0001
[ 19.658749] mmcblk0: mmc0:0001 hC8aP> 58.2 GiB
[ 19.665252] mmcblk0:
[ 19.665969] mmcblk0boot0: mmc0:0001 hC8aP> 4.00 MiB
[ 19.669411] mmcblk0boot1: mmc0:0001 hC8aP> 4.00 MiB
[ 19.672446] mmcblk0rpmb: mmc0:0001 hC8aP> 16.0 MiB, chardev (505:0)
[ 462.450194] sdhci-dwcmshc fe310000.mmc: Can't reduce the clock below 
52MHz in HS200/HS400 mode
[ 462.452168] I/O error, dev mmcblk0, sector 122142719 op 0x1:(WRITE) 
flags 0x800800 phys_seg 1 prio class 2
[ 462.453338] Buffer I/O error on dev mmcblk0, logical block 15267839, 
lost async page write
I have been testing on v7.1.3, and it is known good on v6.18.38.
As the error also occurs at startup, my thought is it could be an 
invalid value in
the device tree, possibly the 24MHz value in rk356x-base.dtsi:1085 ?

^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: PROBLEM: mmc clock reduction error on NanoPi-R5S (rk3568)
  2026-07-20 19:56 PROBLEM: mmc clock reduction error on NanoPi-R5S (rk3568) Peter Taylor
@ 2026-07-22  2:54 ` Shawn Lin
  0 siblings, 0 replies; 2+ messages in thread
From: Shawn Lin @ 2026-07-22  2:54 UTC (permalink / raw)
  To: Peter Taylor; +Cc: shawn.lin, Adrian Hunter, linux-mmc, Ulf Hansson

+ Ulf's new mail

在 2026/07/21 星期二 3:56, Peter Taylor 写道:
> After the changes in 3009738a855c (Prevent illegal clock reduction in
> HS200/HS400 mode), when trying to change the drive's partition table
> using fdisk, it fails when I go to write. Here is the relevant dmesg 
> output.
> [ 19.509615] dwmmc_rockchip fe2b0000.mmc: IDMAC supports 32-bit address 
> mode.
> [ 19.510330] dwmmc_rockchip fe2b0000.mmc: Using internal DMA controller.
> [ 19.511727] dwmmc_rockchip fe2b0000.mmc: Version ID is 270a
> [ 19.512302] dwmmc_rockchip fe2b0000.mmc: DW MMC controller at irq 94,32 
> bit host data width,256 deep fifo
> [ 19.541960] mmc_host mmc1: Bus speed (slot 0) = 375000Hz (slot req 
> 400000Hz, actual 375000HZ div = 0)
> [ 19.563121] mmc0: SDHCI controller on fe310000.mmc [fe310000.mmc] using 
> ADMA
> [ 19.602217] mmc_host mmc1: Bus speed (slot 0) = 50000000Hz (slot req 
> 50000000Hz, actual 50000000HZ div = 0)
> [ 19.603277] mmc1: new high speed SDHC card at address 59b4
> [ 19.647750] mmcblk1: mmc1:59b4 SMI 7.50 GiB
> [ 19.652366] mmcblk1: p1
> [ 19.655584] sdhci-dwcmshc fe310000.mmc: Can't reduce the clock below 
> 52MHz in HS200/HS400 mode
> [ 19.656917] mmc0: new HS400 Enhanced strobe MMC card at address 0001

May I ask which dts file you're using now?
The RK3566/RK3568 SoCs only claim to support HS200.

> [ 19.658749] mmcblk0: mmc0:0001 hC8aP> 58.2 GiB
> [ 19.665252] mmcblk0:
> [ 19.665969] mmcblk0boot0: mmc0:0001 hC8aP> 4.00 MiB
> [ 19.669411] mmcblk0boot1: mmc0:0001 hC8aP> 4.00 MiB
> [ 19.672446] mmcblk0rpmb: mmc0:0001 hC8aP> 16.0 MiB, chardev (505:0)
> [ 462.450194] sdhci-dwcmshc fe310000.mmc: Can't reduce the clock below 
> 52MHz in HS200/HS400 mode
> [ 462.452168] I/O error, dev mmcblk0, sector 122142719 op 0x1:(WRITE) 
> flags 0x800800 phys_seg 1 prio class 2
> [ 462.453338] Buffer I/O error on dev mmcblk0, logical block 15267839, 
> lost async page write
> I have been testing on v7.1.3, and it is known good on v6.18.38.
> As the error also occurs at startup, my thought is it could be an 
> invalid value in
> the device tree, possibly the 24MHz value in rk356x-base.dtsi:1085 ?
> 


^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2026-07-22  6:23 UTC | newest]

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2026-07-20 19:56 PROBLEM: mmc clock reduction error on NanoPi-R5S (rk3568) Peter Taylor
2026-07-22  2:54 ` Shawn Lin

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