[PATCH] mtd: spi-nor: spansion: Fixup params->set_4byte_addr_mode for SEMPER

[PATCH] mtd: spi-nor: spansion: Fixup params->set_4byte_addr_mode for SEMPER

[tkuw584924]

From: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>

Infineon SEMPER flash family does not support E9h opcode as Exit 4-byte
mode (EX4B). Therefore, params->set_4byte_addr_mode is not determined by
BFPT parse. Fixup it up by introducing vendor specific EX4B opcode (B8h)
and function.

Fixes: c87c9b11c53ce ("mtd: spi-nor: spansion: Determine current address mode")
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
---
 drivers/mtd/spi-nor/spansion.c | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c
index bf08dbf5e742..9162b9297ce8 100644
--- a/drivers/mtd/spi-nor/spansion.c
+++ b/drivers/mtd/spi-nor/spansion.c
@@ -17,6 +17,7 @@
 
 #define SPINOR_OP_CLSR		0x30	/* Clear status register 1 */
 #define SPINOR_OP_CLPEF		0x82	/* Clear program/erase failure flags */
+#define SPINOR_OP_CYPRESS_EX4B	0xB8	/* Exit 4-byte address mode */
 #define SPINOR_OP_CYPRESS_DIE_ERASE		0x61	/* Chip (die) erase */
 #define SPINOR_OP_RD_ANY_REG			0x65	/* Read any register */
 #define SPINOR_OP_WR_ANY_REG			0x71	/* Write any register */
@@ -58,6 +59,13 @@
 		   SPI_MEM_OP_DUMMY(ndummy, 0),				\
 		   SPI_MEM_OP_DATA_IN(1, buf, 0))
 
+#define CYPRESS_NOR_EN4B_EX4B_OP(enable)				\
+	SPI_MEM_OP(SPI_MEM_OP_CMD(enable ? SPINOR_OP_EN4B :		\
+					   SPINOR_OP_CYPRESS_EX4B, 0),	\
+		   SPI_MEM_OP_NO_ADDR,					\
+		   SPI_MEM_OP_NO_DUMMY,					\
+		   SPI_MEM_OP_NO_DATA)
+
 #define SPANSION_OP(opcode)						\
 	SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0),				\
 		   SPI_MEM_OP_NO_ADDR,					\
@@ -356,6 +364,20 @@ static int cypress_nor_quad_enable_volatile(struct spi_nor *nor)
 	return 0;
 }
 
+static int cypress_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable)
+{
+	int ret;
+	struct spi_mem_op op = CYPRESS_NOR_EN4B_EX4B_OP(enable);
+
+	spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
+
+	ret = spi_mem_exec_op(nor->spimem, &op);
+	if (ret)
+		dev_dbg(nor->dev, "error %d setting 4-byte mode\n", ret);
+
+	return ret;
+}
+
 /**
  * cypress_nor_determine_addr_mode_by_sr1() - Determine current address mode
  *                                            (3 or 4-byte) by querying status
@@ -424,6 +446,13 @@ static int cypress_nor_set_addr_mode_nbytes(struct spi_nor *nor)
 	u8 addr_mode;
 	int ret;
 
+	/*
+	 * 4-byte address mode method is not determined by BFPT parse as SEMPER
+	 * does not support EX4B(E9h). Assign device-specific method before
+	 * spi_nor_set_4byte_addr_mode() is called.
+	 */
+	nor->params->set_4byte_addr_mode = cypress_nor_set_4byte_addr_mode;
+
 	/*
 	 * Read SR1 by RDSR1 and RDAR(3- AND 4-byte addr). Use write enable
 	 * that sets bit-1 in SR1.
-- 
2.34.1


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Re: [PATCH] mtd: spi-nor: spansion: Fixup params->set_4byte_addr_mode for SEMPER

[Tudor Ambarus]

Hi, Takahiro,

On 6/5/25 9:55 AM, tkuw584924@gmail.com wrote:
> From: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
> 
> Infineon SEMPER flash family does not support E9h opcode as Exit 4-byte
> mode (EX4B). Therefore, params->set_4byte_addr_mode is not determined by
> BFPT parse. Fixup it up by introducing vendor specific EX4B opcode (B8h)
> and function.
> 
> Fixes: c87c9b11c53ce ("mtd: spi-nor: spansion: Determine current address mode")
> Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
> ---
>  drivers/mtd/spi-nor/spansion.c | 29 +++++++++++++++++++++++++++++
>  1 file changed, 29 insertions(+)
> 
> diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c
> index bf08dbf5e742..9162b9297ce8 100644
> --- a/drivers/mtd/spi-nor/spansion.c
> +++ b/drivers/mtd/spi-nor/spansion.c
> @@ -17,6 +17,7 @@
>  
>  #define SPINOR_OP_CLSR		0x30	/* Clear status register 1 */
>  #define SPINOR_OP_CLPEF		0x82	/* Clear program/erase failure flags */
> +#define SPINOR_OP_CYPRESS_EX4B	0xB8	/* Exit 4-byte address mode */
>  #define SPINOR_OP_CYPRESS_DIE_ERASE		0x61	/* Chip (die) erase */
>  #define SPINOR_OP_RD_ANY_REG			0x65	/* Read any register */
>  #define SPINOR_OP_WR_ANY_REG			0x71	/* Write any register */
> @@ -58,6 +59,13 @@
>  		   SPI_MEM_OP_DUMMY(ndummy, 0),				\
>  		   SPI_MEM_OP_DATA_IN(1, buf, 0))
>  
> +#define CYPRESS_NOR_EN4B_EX4B_OP(enable)				\
> +	SPI_MEM_OP(SPI_MEM_OP_CMD(enable ? SPINOR_OP_EN4B :		\
> +					   SPINOR_OP_CYPRESS_EX4B, 0),	\

I wonder if it would make sense to have per vendor opcodes. Updating the
set_4byte_addr_mode() method wouldn't be needed in this case, you would
just need to use some nor->vendor->ops->ex4b opcode, right?

> +		   SPI_MEM_OP_NO_ADDR,					\
> +		   SPI_MEM_OP_NO_DUMMY,					\
> +		   SPI_MEM_OP_NO_DATA)
> +
>  #define SPANSION_OP(opcode)						\
>  	SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0),				\
>  		   SPI_MEM_OP_NO_ADDR,					\
> @@ -356,6 +364,20 @@ static int cypress_nor_quad_enable_volatile(struct spi_nor *nor)
>  	return 0;
>  }
>  
> +static int cypress_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable)
> +{
> +	int ret;
> +	struct spi_mem_op op = CYPRESS_NOR_EN4B_EX4B_OP(enable);
> +
> +	spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
> +
> +	ret = spi_mem_exec_op(nor->spimem, &op);
> +	if (ret)
> +		dev_dbg(nor->dev, "error %d setting 4-byte mode\n", ret);
> +
> +	return ret;
> +}
> +
>  /**
>   * cypress_nor_determine_addr_mode_by_sr1() - Determine current address mode
>   *                                            (3 or 4-byte) by querying status
> @@ -424,6 +446,13 @@ static int cypress_nor_set_addr_mode_nbytes(struct spi_nor *nor)

>  	u8 addr_mode;
>  	int ret;
>  
> +	/*
> +	 * 4-byte address mode method is not determined by BFPT parse as SEMPER
> +	 * does not support EX4B(E9h). Assign device-specific method before
> +	 * spi_nor_set_4byte_addr_mode() is called.
> +	 */
> +	nor->params->set_4byte_addr_mode = cypress_nor_set_4byte_addr_mode;

not here please, but in the post_bfpt fixup hook.
addr_mode_nbytes is described in BFPT_DWORD[1], while
set_4byte_addr_mode in BFPT_DWORD[16], 2 different things.

Cheers,
ta

> +
>  	/*
>  	 * Read SR1 by RDSR1 and RDAR(3- AND 4-byte addr). Use write enable
>  	 * that sets bit-1 in SR1.


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Re: [PATCH] mtd: spi-nor: spansion: Fixup params->set_4byte_addr_mode for SEMPER

[Takahiro Kuwano]

On 6/10/2025 12:19 AM, Tudor Ambarus wrote:
> Hi, Takahiro,
> 
> On 6/5/25 9:55 AM, tkuw584924@gmail.com wrote:
>> From: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
>>
>> Infineon SEMPER flash family does not support E9h opcode as Exit 4-byte
>> mode (EX4B). Therefore, params->set_4byte_addr_mode is not determined by
>> BFPT parse. Fixup it up by introducing vendor specific EX4B opcode (B8h)
>> and function.
>>
>> Fixes: c87c9b11c53ce ("mtd: spi-nor: spansion: Determine current address mode")
>> Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
>> ---
>>  drivers/mtd/spi-nor/spansion.c | 29 +++++++++++++++++++++++++++++
>>  1 file changed, 29 insertions(+)
>>
>> diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c
>> index bf08dbf5e742..9162b9297ce8 100644
>> --- a/drivers/mtd/spi-nor/spansion.c
>> +++ b/drivers/mtd/spi-nor/spansion.c
>> @@ -17,6 +17,7 @@
>>  
>>  #define SPINOR_OP_CLSR		0x30	/* Clear status register 1 */
>>  #define SPINOR_OP_CLPEF		0x82	/* Clear program/erase failure flags */
>> +#define SPINOR_OP_CYPRESS_EX4B	0xB8	/* Exit 4-byte address mode */
>>  #define SPINOR_OP_CYPRESS_DIE_ERASE		0x61	/* Chip (die) erase */
>>  #define SPINOR_OP_RD_ANY_REG			0x65	/* Read any register */
>>  #define SPINOR_OP_WR_ANY_REG			0x71	/* Write any register */
>> @@ -58,6 +59,13 @@
>>  		   SPI_MEM_OP_DUMMY(ndummy, 0),				\
>>  		   SPI_MEM_OP_DATA_IN(1, buf, 0))
>>  
>> +#define CYPRESS_NOR_EN4B_EX4B_OP(enable)				\
>> +	SPI_MEM_OP(SPI_MEM_OP_CMD(enable ? SPINOR_OP_EN4B :		\
>> +					   SPINOR_OP_CYPRESS_EX4B, 0),	\
> 
> I wonder if it would make sense to have per vendor opcodes. Updating the
> set_4byte_addr_mode() method wouldn't be needed in this case, you would
> just need to use some nor->vendor->ops->ex4b opcode, right?
> 
Do you mean introducing new vendor opcodes structure into nor or
nor->params?

>> +		   SPI_MEM_OP_NO_ADDR,					\
>> +		   SPI_MEM_OP_NO_DUMMY,					\
>> +		   SPI_MEM_OP_NO_DATA)
>> +
>>  #define SPANSION_OP(opcode)						\
>>  	SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0),				\
>>  		   SPI_MEM_OP_NO_ADDR,					\
>> @@ -356,6 +364,20 @@ static int cypress_nor_quad_enable_volatile(struct spi_nor *nor)
>>  	return 0;
>>  }
>>  
>> +static int cypress_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable)
>> +{
>> +	int ret;
>> +	struct spi_mem_op op = CYPRESS_NOR_EN4B_EX4B_OP(enable);
>> +
>> +	spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
>> +
>> +	ret = spi_mem_exec_op(nor->spimem, &op);
>> +	if (ret)
>> +		dev_dbg(nor->dev, "error %d setting 4-byte mode\n", ret);
>> +
>> +	return ret;
>> +}
>> +
>>  /**
>>   * cypress_nor_determine_addr_mode_by_sr1() - Determine current address mode
>>   *                                            (3 or 4-byte) by querying status
>> @@ -424,6 +446,13 @@ static int cypress_nor_set_addr_mode_nbytes(struct spi_nor *nor)
> 
>>  	u8 addr_mode;
>>  	int ret;
>>  
>> +	/*
>> +	 * 4-byte address mode method is not determined by BFPT parse as SEMPER
>> +	 * does not support EX4B(E9h). Assign device-specific method before
>> +	 * spi_nor_set_4byte_addr_mode() is called.
>> +	 */
>> +	nor->params->set_4byte_addr_mode = cypress_nor_set_4byte_addr_mode;
> 
> not here please, but in the post_bfpt fixup hook.
> addr_mode_nbytes is described in BFPT_DWORD[1], while
> set_4byte_addr_mode in BFPT_DWORD[16], 2 different things.
> 
Noted.

Thanks,
Takahiro

> Cheers,
> ta
> 
>> +
>>  	/*
>>  	 * Read SR1 by RDSR1 and RDAR(3- AND 4-byte addr). Use write enable
>>  	 * that sets bit-1 in SR1.
> 


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Re: [PATCH] mtd: spi-nor: spansion: Fixup params->set_4byte_addr_mode for SEMPER

[Tudor Ambarus]

On 6/12/25 8:01 AM, Takahiro Kuwano wrote:
> On 6/10/2025 12:19 AM, Tudor Ambarus wrote:
>> Hi, Takahiro,
>>
>> On 6/5/25 9:55 AM, tkuw584924@gmail.com wrote:
>>> From: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
>>>
>>> Infineon SEMPER flash family does not support E9h opcode as Exit 4-byte
>>> mode (EX4B). Therefore, params->set_4byte_addr_mode is not determined by
>>> BFPT parse. Fixup it up by introducing vendor specific EX4B opcode (B8h)
>>> and function.
>>>
>>> Fixes: c87c9b11c53ce ("mtd: spi-nor: spansion: Determine current address mode")
>>> Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
>>> ---
>>>  drivers/mtd/spi-nor/spansion.c | 29 +++++++++++++++++++++++++++++
>>>  1 file changed, 29 insertions(+)
>>>
>>> diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c
>>> index bf08dbf5e742..9162b9297ce8 100644
>>> --- a/drivers/mtd/spi-nor/spansion.c
>>> +++ b/drivers/mtd/spi-nor/spansion.c
>>> @@ -17,6 +17,7 @@
>>>  
>>>  #define SPINOR_OP_CLSR		0x30	/* Clear status register 1 */
>>>  #define SPINOR_OP_CLPEF		0x82	/* Clear program/erase failure flags */
>>> +#define SPINOR_OP_CYPRESS_EX4B	0xB8	/* Exit 4-byte address mode */
>>>  #define SPINOR_OP_CYPRESS_DIE_ERASE		0x61	/* Chip (die) erase */
>>>  #define SPINOR_OP_RD_ANY_REG			0x65	/* Read any register */
>>>  #define SPINOR_OP_WR_ANY_REG			0x71	/* Write any register */
>>> @@ -58,6 +59,13 @@
>>>  		   SPI_MEM_OP_DUMMY(ndummy, 0),				\
>>>  		   SPI_MEM_OP_DATA_IN(1, buf, 0))
>>>  
>>> +#define CYPRESS_NOR_EN4B_EX4B_OP(enable)				\
>>> +	SPI_MEM_OP(SPI_MEM_OP_CMD(enable ? SPINOR_OP_EN4B :		\
>>> +					   SPINOR_OP_CYPRESS_EX4B, 0),	\
>>
>> I wonder if it would make sense to have per vendor opcodes. Updating the
>> set_4byte_addr_mode() method wouldn't be needed in this case, you would
>> just need to use some nor->vendor->ops->ex4b opcode, right?
>>
> Do you mean introducing new vendor opcodes structure into nor or
> nor->params?

something like that. Maybe not right now, but something to have in mind
if we keep seeing vendor specific opcodes that are different than the
usual (BFPT-described?) ones.


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Re: [PATCH] mtd: spi-nor: spansion: Fixup params->set_4byte_addr_mode for SEMPER

[Takahiro Kuwano]

On 6/12/2025 4:04 PM, Tudor Ambarus wrote:
> 
> 
> On 6/12/25 8:01 AM, Takahiro Kuwano wrote:
>> On 6/10/2025 12:19 AM, Tudor Ambarus wrote:
>>> Hi, Takahiro,
>>>
>>> On 6/5/25 9:55 AM, tkuw584924@gmail.com wrote:
>>>> From: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
>>>>
>>>> Infineon SEMPER flash family does not support E9h opcode as Exit 4-byte
>>>> mode (EX4B). Therefore, params->set_4byte_addr_mode is not determined by
>>>> BFPT parse. Fixup it up by introducing vendor specific EX4B opcode (B8h)
>>>> and function.
>>>>
>>>> Fixes: c87c9b11c53ce ("mtd: spi-nor: spansion: Determine current address mode")
>>>> Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
>>>> ---
>>>>  drivers/mtd/spi-nor/spansion.c | 29 +++++++++++++++++++++++++++++
>>>>  1 file changed, 29 insertions(+)
>>>>
>>>> diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c
>>>> index bf08dbf5e742..9162b9297ce8 100644
>>>> --- a/drivers/mtd/spi-nor/spansion.c
>>>> +++ b/drivers/mtd/spi-nor/spansion.c
>>>> @@ -17,6 +17,7 @@
>>>>  
>>>>  #define SPINOR_OP_CLSR		0x30	/* Clear status register 1 */
>>>>  #define SPINOR_OP_CLPEF		0x82	/* Clear program/erase failure flags */
>>>> +#define SPINOR_OP_CYPRESS_EX4B	0xB8	/* Exit 4-byte address mode */
>>>>  #define SPINOR_OP_CYPRESS_DIE_ERASE		0x61	/* Chip (die) erase */
>>>>  #define SPINOR_OP_RD_ANY_REG			0x65	/* Read any register */
>>>>  #define SPINOR_OP_WR_ANY_REG			0x71	/* Write any register */
>>>> @@ -58,6 +59,13 @@
>>>>  		   SPI_MEM_OP_DUMMY(ndummy, 0),				\
>>>>  		   SPI_MEM_OP_DATA_IN(1, buf, 0))
>>>>  
>>>> +#define CYPRESS_NOR_EN4B_EX4B_OP(enable)				\
>>>> +	SPI_MEM_OP(SPI_MEM_OP_CMD(enable ? SPINOR_OP_EN4B :		\
>>>> +					   SPINOR_OP_CYPRESS_EX4B, 0),	\
>>>
>>> I wonder if it would make sense to have per vendor opcodes. Updating the
>>> set_4byte_addr_mode() method wouldn't be needed in this case, you would
>>> just need to use some nor->vendor->ops->ex4b opcode, right?
>>>
>> Do you mean introducing new vendor opcodes structure into nor or
>> nor->params?
> 
> something like that. Maybe not right now, but something to have in mind
> if we keep seeing vendor specific opcodes that are different than the
> usual (BFPT-described?) ones.
> 
Understood, thanks!


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