From: Michael Walle <mwalle@kernel.org>
To: Jaime Liao <jaimeliao.tw@gmail.com>
Cc: linux-mtd@lists.infradead.org, tudor.ambarus@linaro.org,
pratyush@kernel.org, miquel.raynal@bootlin.com,
leoyu@mxic.com.tw, jaimeliao@mxic.com.tw
Subject: Re: [PATCH v7 3/7] mtd: spi-nor: core: Allow specifying the byte order in DTR mode
Date: Fri, 05 Jan 2024 13:59:05 +0100 [thread overview]
Message-ID: <103152f83138bbbadeea2798a11e6e2c@kernel.org> (raw)
In-Reply-To: <20231221090702.103027-4-jaimeliao.tw@gmail.com>
Hi,
> Macronix swaps bytes on a 16-bit boundary when configured in Octal DTR.
> The byte order of 16-bit words is swapped when read or written in
> 8D-8D-8D
> mode compared to STR modes. Allow operations to specify the byte order
> in
> DTR mode, so that controllers can swap the bytes back at run-time to
> address the flash's endianness requirements, if they are capable. If
> the
> controllers are not capable of swapping the bytes, the protocol is
> downgrade via spi_nor_spimem_adjust_hwcaps(). When available, the
> swapping
> of the bytes is always done regardless if it's a data or register
> access,
> so that we comply with the JESD216 requirements: "Byte order of 16-bit
> words is swapped when read in 8D-8D-8D mode compared to 1-1-1".
>
> Merge Tudor's patch and add modifications for suiting newer version
> of Linux kernel.
>
> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
> Signed-off-by: JaimeLiao <jaimeliao@mxic.com.tw>
> ---
> drivers/mtd/spi-nor/core.c | 8 ++++++++
> drivers/mtd/spi-nor/core.h | 1 +
> 2 files changed, 9 insertions(+)
>
> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
> index 1c443fe568cf..f659dd037a25 100644
> --- a/drivers/mtd/spi-nor/core.c
> +++ b/drivers/mtd/spi-nor/core.c
> @@ -70,6 +70,13 @@ static u8 spi_nor_get_cmd_ext(const struct spi_nor
> *nor,
> }
> }
>
> +static inline bool spi_nor_is_octal_dtr_swab16(const struct spi_nor
> *nor,
> + enum spi_nor_protocol proto)
> +{
> + return (proto == SNOR_PROTO_8_8_8_DTR) &&
> + (nor->flags & SNOR_F_DTR_SWAB16);
> +}
> +
> /**
> * spi_nor_spimem_setup_op() - Set up common properties of a spi-mem
> op.
> * @nor: pointer to a 'struct spi_nor'
> @@ -105,6 +112,7 @@ void spi_nor_spimem_setup_op(const struct spi_nor
> *nor,
> op->addr.dtr = true;
> op->dummy.dtr = true;
> op->data.dtr = true;
> + op->data.dtr_swab16 = spi_nor_is_octal_dtr_swab16(nor, proto);
Just use
dtr_swap16 = nor->flags & SNOR_F_DTR_SWAP16;
Again, I don't really like DTR_SWAP16. JESD216 just mention swapping for
8d8d8d. Depends on how generic we want to go. I'd go with swap16 and
mention
that for now, it is only applicable if data.buswidth == 8 and
data.dtr == true.
-michael
> /* 2 bytes per clock cycle in DTR mode. */
> op->dummy.nbytes *= 2;
> diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
> index 93cd2fc3606d..fe1259b32110 100644
> --- a/drivers/mtd/spi-nor/core.h
> +++ b/drivers/mtd/spi-nor/core.h
> @@ -140,6 +140,7 @@ enum spi_nor_option_flags {
> SNOR_F_RWW = BIT(14),
> SNOR_F_ECC = BIT(15),
> SNOR_F_NO_WP = BIT(16),
> + SNOR_F_DTR_SWAB16 = BIT(17),
> };
>
> struct spi_nor_read_command {
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2024-01-05 12:59 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-21 9:06 [PATCH v7 0/7] Add octal DTR support for Macronix flash Jaime Liao
2023-12-21 9:06 ` [PATCH v7 1/7] mtd: spi-nor: add Octal " Jaime Liao
2024-01-05 13:12 ` Michael Walle
2024-01-12 8:10 ` Tudor Ambarus
2023-12-21 9:06 ` [PATCH v7 2/7] spi: spi-mem: Allow specifying the byte order in DTR mode Jaime Liao
2024-01-05 12:48 ` Michael Walle
2024-01-12 8:29 ` Tudor Ambarus
2024-01-12 8:31 ` Michael Walle
2024-01-05 13:02 ` Michael Walle
2024-01-12 5:44 ` liao jaime
2024-01-12 8:15 ` Tudor Ambarus
2023-12-21 9:06 ` [PATCH v7 3/7] mtd: spi-nor: core: " Jaime Liao
2024-01-05 12:59 ` Michael Walle [this message]
2024-01-12 5:17 ` liao jaime
2024-01-12 8:31 ` Tudor Ambarus
2023-12-21 9:06 ` [PATCH v7 4/7] mtd: spi-nor: sfdp: Get the 8D-8D-8D byte order from BFPT Jaime Liao
2024-01-05 13:02 ` Michael Walle
2023-12-21 9:07 ` [PATCH v7 5/7] spi: mxic: Add support for swapping byte Jaime Liao
2024-01-05 12:37 ` Michael Walle
2024-01-12 5:14 ` liao jaime
2023-12-21 9:07 ` [PATCH v7 6/7] mtd: spi-nor: add support for Macronix Octal flash with RWW feature Jaime Liao
2024-01-05 13:07 ` Michael Walle
2024-01-12 8:42 ` Tudor Ambarus
2023-12-21 9:07 ` [PATCH v7 7/7] mtd: spi-nor: add support for Macronix Octal flash Jaime Liao
2024-01-05 13:11 ` Michael Walle
2024-01-12 5:47 ` liao jaime
2024-01-12 8:44 ` Tudor Ambarus
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=103152f83138bbbadeea2798a11e6e2c@kernel.org \
--to=mwalle@kernel.org \
--cc=jaimeliao.tw@gmail.com \
--cc=jaimeliao@mxic.com.tw \
--cc=leoyu@mxic.com.tw \
--cc=linux-mtd@lists.infradead.org \
--cc=miquel.raynal@bootlin.com \
--cc=pratyush@kernel.org \
--cc=tudor.ambarus@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox