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* [PATCH] mtd: nand: samsung: add datasheet minimum strength requirements for a chip
@ 2017-11-30 15:10 Miquel Raynal
  2017-12-06  8:24 ` Boris Brezillon
  0 siblings, 1 reply; 2+ messages in thread
From: Miquel Raynal @ 2017-11-30 15:10 UTC (permalink / raw)
  To: Boris Brezillon, Richard Weinberger, David Woodhouse,
	Brian Norris, Marek Vasut, Cyrille Pitchen
  Cc: linux-mtd, Miquel Raynal

Samsung NAND chip K9F4G08U0D minimum ECC strength requirement is 1 bit
per 512 bytes. As the chip is not ONFI nor JEDEC and because of the lack
of these values, boards using it failed to probe the NAND controller
driver. Fix this by adding the default values if needed.

Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
---
 drivers/mtd/nand/nand_samsung.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/mtd/nand/nand_samsung.c b/drivers/mtd/nand/nand_samsung.c
index d348f0129ae7..5dc4fa4862d7 100644
--- a/drivers/mtd/nand/nand_samsung.c
+++ b/drivers/mtd/nand/nand_samsung.c
@@ -91,6 +91,13 @@ static void samsung_nand_decode_id(struct nand_chip *chip)
 		}
 	} else {
 		nand_decode_ext_id(chip);
+
+		/* Datasheet values for SLC Samsung K9F4G08U0D-S[I|C]B0(T00) */
+		if (nand_is_slc(chip) && chip->id.data[1] == 0xDC &&
+		    (!chip->ecc_step_ds || !chip->ecc_strength_ds)) {
+			chip->ecc_step_ds = 512;
+			chip->ecc_strength_ds = 1;
+		}
 	}
 }
 
-- 
2.11.0

^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH] mtd: nand: samsung: add datasheet minimum strength requirements for a chip
  2017-11-30 15:10 [PATCH] mtd: nand: samsung: add datasheet minimum strength requirements for a chip Miquel Raynal
@ 2017-12-06  8:24 ` Boris Brezillon
  0 siblings, 0 replies; 2+ messages in thread
From: Boris Brezillon @ 2017-12-06  8:24 UTC (permalink / raw)
  To: Miquel Raynal
  Cc: Richard Weinberger, David Woodhouse, Brian Norris, Marek Vasut,
	Cyrille Pitchen, linux-mtd

Hi Miquel,

On Thu, 30 Nov 2017 16:10:41 +0100
Miquel Raynal <miquel.raynal@free-electrons.com> wrote:

Why not naming the chip in the subject line?

"mtd: nand: samsung: add ECC requirements for K9F4G08U0D"

> Samsung NAND chip K9F4G08U0D minimum ECC strength requirement is 1 bit
> per 512 bytes. As the chip is not ONFI nor JEDEC and because of the lack
> of these values, boards using it failed to probe the NAND controller
> driver. Fix this by adding the default values if needed.
> 
> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
> ---
>  drivers/mtd/nand/nand_samsung.c | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/mtd/nand/nand_samsung.c b/drivers/mtd/nand/nand_samsung.c
> index d348f0129ae7..5dc4fa4862d7 100644
> --- a/drivers/mtd/nand/nand_samsung.c
> +++ b/drivers/mtd/nand/nand_samsung.c
> @@ -91,6 +91,13 @@ static void samsung_nand_decode_id(struct nand_chip *chip)
>  		}
>  	} else {
>  		nand_decode_ext_id(chip);
> +
> +		/* Datasheet values for SLC Samsung K9F4G08U0D-S[I|C]B0(T00) */
> +		if (nand_is_slc(chip) && chip->id.data[1] == 0xDC &&
> +		    (!chip->ecc_step_ds || !chip->ecc_strength_ds)) {

Why do you test chip->ecc_step_ds and chip->ecc_strenght_ds values? I
mean, the chip is not ONFI or JEDEC compliant, so there's no reason
these fields would have been assigned to something != 0, and if they
were, it's a bug.

> +			chip->ecc_step_ds = 512;
> +			chip->ecc_strength_ds = 1;
> +		}
>  	}
>  }
>  

^ permalink raw reply	[flat|nested] 2+ messages in thread

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