From: Miquel Raynal <miquel.raynal@bootlin.com>
To: "Jakub \"Kuba\" Czapiga" <czapiga@google.com>
Cc: Tudor Ambarus <tudor.ambarus@linaro.org>,
Pratyush Yadav <pratyush@kernel.org>,
Michael Walle <mwalle@kernel.org>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
Konrad Adamczyk <konrada@google.com>,
Adeel Arshad <adeel.arshad@intel.com>,
Mika Westerberg <mika.westerberg@linux.intel.com>
Subject: Re: [PATCH] mtd: spi-nor: core: Check read CR support
Date: Wed, 10 Sep 2025 16:45:28 +0200 [thread overview]
Message-ID: <87a532cqnr.fsf@bootlin.com> (raw)
In-Reply-To: <CABkukdpRxHFg9FbaV1GnS5UG3-ZxdxPbjKYdUpdmvOcLs5phKA@mail.gmail.com> (Jakub Czapiga's message of "Wed, 10 Sep 2025 16:30:43 +0200")
Hello,
On 10/09/2025 at 16:30:43 +02, "Jakub \"Kuba\" Czapiga" <czapiga@google.com> wrote:
> Hi Miquèl,
>
> On Wed, Sep 10, 2025 at 2:05 PM Miquel Raynal <miquel.raynal@bootlin.com> wrote:
>>
>> Hi Jakub,
>>
>> > diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
>> > index ac4b960101cc..79deee3a50d3 100644
>> > --- a/drivers/mtd/spi-nor/core.c
>> > +++ b/drivers/mtd/spi-nor/core.c
>> > @@ -2608,6 +2608,10 @@ static int spi_nor_setup(struct spi_nor *nor,
>> > }
>> > }
>> >
>> > + /* Some SPI controllers might not support CR read opcode. */
>> > + if (spi_nor_read_cr(nor, nor->bouncebuf) == -EOPNOTSUPP)
>>
>> There is a spi_nor_spimem_check_op() helper which might be better suited
>> for this purpose?
>
> spi_nor_spimem_check_op() works only for spi-mem devices. spi_nor_read_cr()
> handles both spi-mem and spi-nor controller. Using spi_nor_spimem_check_op()
> would require adding a variation of spi_nor_read_cr() that would use
> spi_nor_spimem_check_op() for spi-mem and spi_nor_controller_ops_read_reg()
> for spi-nor controller.
> Another way would be to do this check only for the spi-mem as spi-nor
> controllers seem to be deprecated in favour of spi-mem.
I'll let that choice to SPI NOR maintainers but we've collectively asked
to switch in favor of the spi memory API for quite some time, I would
not care too much about compatibility with the two remaining controllers
that have not yet been converted.
But here is a proper illustration why spi-mem rocks and why SPI NOR
controllers, besides making no sense (because we also have SPI NANDs
now) have a flacky API as of today's standards.
Thanks,
Miquèl
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next prev parent reply other threads:[~2025-09-10 14:45 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-10 10:33 [PATCH] mtd: spi-nor: core: Check read CR support Jakub Czapiga
2025-09-10 12:04 ` Miquel Raynal
2025-09-10 14:30 ` Jakub "Kuba" Czapiga
2025-09-10 14:45 ` Miquel Raynal [this message]
2025-09-10 15:00 ` Tudor Ambarus
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