From: Marek Vasut <marek.vasut@gmail.com>
To: Marcin Krzeminski <mar.krzeminski@gmail.com>,
cyrille.pitchen@atmel.com, linux-mtd@lists.infradead.org
Cc: dwmw2@infradead.org, computersforpeace@gmail.com,
boris.brezillon@free-electrons.com
Subject: Re: [PATCH v4 1/2] mtd: spi-nor: Fix whole chip erasing for stacked chips.
Date: Sat, 7 Jan 2017 00:45:00 +0100 [thread overview]
Message-ID: <e9a447d9-da58-87ac-3136-d1dc0c75d591@gmail.com> (raw)
In-Reply-To: <20170106171901.27565-2-mar.krzeminski@gmail.com>
On 01/06/2017 06:19 PM, Marcin Krzeminski wrote:
> Currently it is possible to disable chip erase for spi-nor driver.
> Some modern stacked (multi die) flash chips do not support chip
> erase opcode at all but spi-nor framework needs to cope with them too.
> This commit extends existing functionality to allow disable
> chip erase for a single flash chip.
I wonder whether this should really be opt-out flag. Since we'll see
more multi-die chips (and chips with different die sizes), I'd say this
should rather be opt-in flag.
> Signed-off-by: Marcin Krzeminski <mar.krzeminski@gmail.com>
> ---
> drivers/mtd/spi-nor/spi-nor.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index 2a643a1..595de54 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -85,6 +85,7 @@ struct flash_info {
> * Use dedicated 4byte address op codes
> * to support memory size above 128Mib.
> */
> +#define NO_CHIP_ERASE BIT(12) /* Chip does not support chip erase */
> };
>
> #define JEDEC_MFR(info) ((info)->id[0])
> @@ -1621,6 +1622,8 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, enum read_mode mode)
> nor->flags |= SNOR_F_USE_FSR;
> if (info->flags & SPI_NOR_HAS_TB)
> nor->flags |= SNOR_F_HAS_SR_TB;
> + if (info->flags & NO_CHIP_ERASE)
> + nor->flags |= SNOR_F_NO_OP_CHIP_ERASE;
>
> #ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS
> /* prefer "small sector" erase if possible */
>
--
Best regards,
Marek Vasut
next prev parent reply other threads:[~2017-01-07 0:24 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-06 17:18 [PATCH v4 0/2] mtd: spi-nor: Add possibility to disable chip erase Marcin Krzeminski
2017-01-06 17:19 ` [PATCH v4 1/2] mtd: spi-nor: Fix whole chip erasing for stacked chips Marcin Krzeminski
2017-01-06 23:45 ` Marek Vasut [this message]
2017-01-07 22:33 ` mar.krzeminski
2017-01-10 17:24 ` Cyrille Pitchen
2017-01-10 17:44 ` Marek Vasut
2017-01-11 11:03 ` Cyrille Pitchen
2017-01-11 13:07 ` Marek Vasut
2017-01-06 17:19 ` [PATCH v4 2/2] mtd: spi-nor: Disable chip erase for Micron n25q00 Marcin Krzeminski
2017-03-22 21:00 ` [PATCH v4 0/2] mtd: spi-nor: Add possibility to disable chip erase Cyrille Pitchen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=e9a447d9-da58-87ac-3136-d1dc0c75d591@gmail.com \
--to=marek.vasut@gmail.com \
--cc=boris.brezillon@free-electrons.com \
--cc=computersforpeace@gmail.com \
--cc=cyrille.pitchen@atmel.com \
--cc=dwmw2@infradead.org \
--cc=linux-mtd@lists.infradead.org \
--cc=mar.krzeminski@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox